Each SimicsProcessor attaches to a Sequencer which issues requests to an L1
cache controller.
The number of L1s certainly does not need to match the PROCS_PER_CHIP
parameter.
--Mike
> -----Original Message-----
> From: gems-users-bounces@xxxxxxxxxxx [mailto:gems-users-
> bounces@xxxxxxxxxxx] On Behalf Of Hemayet Hossain
> Sent: Friday, October 20, 2006 8:57 PM
> To: gems-users@xxxxxxxxxxx
> Subject: [Gems-users] Changing processors per chip
>
>
> Sorry, my earlier email had wrong subject heading.
>
> Currently the ruby requires "the number L1Cache controller to be equals
> to the number of processor per chip". Can anybody tell me why is that
> requirement is to maintain? If I want to change that constraint then
> where have I to change (any pointer for looking)? I will really
> appreciate any sort of reply.
> Thanks.
> ------
> Hemayet
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