Hi Everybody,
I was looking over the MSI_MOSI_SMP_directory proctocol. In *-L1Cache.sm
file for an IFetch, if the block is in L1D then an event L1_WriteBack is
triggered which deallocates the copy from L1D, allocates space and copy
data in TBE, and issues PUTS. The original cache message is kept in the
mandatory queue. I could not confidently trace what happend after that.
Can any body tell me the flow of this (I mean upto loading the the
instruction to L1I) considering timing steps? May be it's a long answer,
but any answer will be appreciated.
Thanks.
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Hemayet Hossain
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