Re: [Gems-users] Simulating Sparc T1

[Greg Byrd <gbyrd@xxxxxxxx>]

I had a student do a project to model a multithreaded processor using 
multiple Simics processors.  It's not SMT.
...Greg Byrd, NC State


Nauman Rafique wrote:

> Hi gems-users,
> I noticed that Ultrasparc T1 is a single issue, inorder pipeline with no branch
> prediction. I was wondering if we can simulate it avoiding the overhead of opal.
> The only change I see (correct me if I am wrong) is making SMT. Anyone who has
> already done it or have nice ideas about it efficiently, please feel free to
> share :)
>
> Thanks.
>