[DynInst_API:] [dyninst/dyninst] 8875a9: Move operand accumulation into decoder for RISCV (...

[Tim Haines <noreply@xxxxxxxxxx>]

  Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: 8875a92fea87e57d1f82f94eb3cb52945c412e5b
      https://github.com/dyninst/dyninst/commit/8875a92fea87e57d1f82f94eb3cb52945c412e5b
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2026-04-01 (Wed, 01 Apr 2026)

  Changed paths:
    M instructionAPI/src/InstructionDecoderImpl.h
    M instructionAPI/src/decoder/riscv/decoder.C
    M instructionAPI/src/decoder/riscv/decoder.h

  Log Message:
  -----------
  Move operand accumulation into decoder for RISCV (#2189)

In add_branch_insn_successors, the CFT operand for riscv64_op_jal and
riscv64_op_jalr are now explicitly marked as implicit. Without this, the
decoder tests were failing due to the extra explicit operand. It's
unclear why this change is needed since the previous call to
addSuccessor implicitly set 'isImplicit' to false.



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