[DynInst_API:] [dyninst/dyninst] 7d6f55: Add VGPR ID range

[Ronak Chauhan <noreply@xxxxxxxxxx>]

  Branch: refs/heads/ronak/amdgpu-regblock-alloc
  Home:   https://github.com/dyninst/dyninst
  Commit: 7d6f551d88552af11413dd9cdbffa956e958cf0d
      https://github.com/dyninst/dyninst/commit/7d6f551d88552af11413dd9cdbffa956e958cf0d
  Author: Ronak Chauhan <ronak@xxxxxxxxxxx>
  Date:   2026-01-22 (Thu, 22 Jan 2026)

  Changed paths:
    M dyninstAPI/src/amdgpu-gfx908-details.h

  Log Message:
  -----------
  Add VGPR ID range


  Commit: 6ddd9bad94024bedfa838fbec793ef1decd3d6f1
      https://github.com/dyninst/dyninst/commit/6ddd9bad94024bedfa838fbec793ef1decd3d6f1
  Author: Ronak Chauhan <ronak@xxxxxxxxxxx>
  Date:   2026-01-22 (Thu, 22 Jan 2026)

  Changed paths:
    M dyninstAPI/src/ast.C

  Log Message:
  -----------
  Begin using register blocks to lower atomic operation statement

The register pair holding base address of instrumentation variables
is still hardcoded.


Compare: https://github.com/dyninst/dyninst/compare/334daf4b030f...6ddd9bad9402

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