| Date: | Thu, 22 Jan 2026 08:20:07 -0800 |
|---|---|
| From: | Ronak Chauhan <noreply@xxxxxxxxxx> |
| Subject: | [DynInst_API:] [dyninst/dyninst] bda898: Add VGPR ID range |
Branch: refs/heads/ronak/amdgpu-regblock-alloc Home: https://github.com/dyninst/dyninst Commit: bda8981b4ea3014a81504d2911bf2081248843b3 https://github.com/dyninst/dyninst/commit/bda8981b4ea3014a81504d2911bf2081248843b3 Author: Ronak Chauhan <ronak@xxxxxxxxxxx> Date: 2026-01-22 (Thu, 22 Jan 2026) Changed paths: M dyninstAPI/src/amdgpu-gfx908-details.h Log Message: ----------- Add VGPR ID range Commit: 334daf4b030f039cc1205014a8f51b4e5bd64360 https://github.com/dyninst/dyninst/commit/334daf4b030f039cc1205014a8f51b4e5bd64360 Author: Ronak Chauhan <ronak@xxxxxxxxxxx> Date: 2026-01-22 (Thu, 22 Jan 2026) Changed paths: M dyninstAPI/src/ast.C M dyninstAPI/src/registerSpace.C M dyninstAPI/src/registerSpace.h Log Message: ----------- [AMDGPU] Start with allocating register blocks in lowering atomic operations The base address of instrumentation variables is still hardcoded Compare: https://github.com/dyninst/dyninst/compare/bda8981b4ea3%5E...334daf4b030f To unsubscribe from these emails, change your notification settings at https://github.com/dyninst/dyninst/settings/notifications |
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