|   Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: 6719c79cae4cfcf40afac4e5d5edea24d1725e9f
      https://github.com/dyninst/dyninst/commit/6719c79cae4cfcf40afac4e5d5edea24d1725e9f
  Author: wxrdnx <67510189+wxrdnx@xxxxxxxxxxxxxxxxxxxxxxxx>
  Date:   2025-09-30 (Tue, 30 Sep 2025)
  Changed paths:
    M common/CMakeLists.txt
    M common/h/Architecture.h
    M common/h/dyn_regs.h
    M common/h/entryIDs.h
    A common/h/mnemonics/riscv64_entryIDs.h
    A common/h/registers/riscv64_regs.h
    M common/src/registers/MachRegister.C
    M dataflowAPI/rose/registers/convert.C
    A dataflowAPI/rose/registers/riscv64.h
    M dataflowAPI/src/ExpressionConversionVisitor.C
    M dwarf/CMakeLists.txt
    M dwarf/src/dwarfHandle.C
    M dwarf/src/registers/convert.C
    A dwarf/src/registers/riscv64.h
    M elf/src/Elf_X.C
    A external/rose/riscv64InstructionEnum.h
    M instructionAPI/capstone/import_mnemonics.py
    A instructionAPI/capstone/riscv64/mnemonics.py
    A instructionAPI/capstone/riscv64/registers.py
    M instructionAPI/src/Instruction.C
    M instructionAPI/src/interrupts.C
    M instructionAPI/src/syscalls.C
    M parseAPI/src/SymbolicExpression.C
    M proccontrol/src/process.C
    M symtabAPI/src/Object-elf.C
    M tests/unit/MachRegister/base_registers/CMakeLists.txt
    A tests/unit/MachRegister/base_registers/riscv64.cpp
    M tests/unit/MachRegister/type_queries/CMakeLists.txt
    A tests/unit/MachRegister/type_queries/riscv64.cpp
    M tests/unit/dataflowAPI/rose/registers/CMakeLists.txt
    A tests/unit/dataflowAPI/rose/registers/riscv64.cpp
  Log Message:
  -----------
  Add RISC-V instruction mnemonics and registers (#1831)
This commit contains instruction mnemonics for
basic RISC-V instruction set and registers
To unsubscribe from these emails, change your notification settings at https://github.com/dyninst/dyninst/settings/notifications
 |