Branch: refs/heads/angushe/riscv
Home: https://github.com/dyninst/dyninst
Commit: 8e4391ad0d80735ea579bf2527b96a63fca2c3e1
https://github.com/dyninst/dyninst/commit/8e4391ad0d80735ea579bf2527b96a63fca2c3e1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M CMakeLists.txt
A cmake/tpls/DyninstCapstone.cmake
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Add CMake stub
Commit: e58bb8927ce637cf0b8114a40adc5f517025d7a4
https://github.com/dyninst/dyninst/commit/e58bb8927ce637cf0b8114a40adc5f517025d7a4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A instructionAPI/capstone/import.py
A instructionAPI/capstone/x86.py
Log Message:
-----------
Make parameter the root directory in import script
Instead of specifying the file name, the user just points to the
directory and the script will grab the necessary files.
Commit: 01339e5c3c86b05dca2d499054e94c36f0b54724
https://github.com/dyninst/dyninst/commit/01339e5c3c86b05dca2d499054e94c36f0b54724
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/capstone/import.py
M instructionAPI/capstone/x86.py
Log Message:
-----------
Alias faddp to fadd
Capstone only uses fadd. This does not modify the entryIDs yet.
Commit: 6fc136bcbd1cd4ba6188540cd8a105c1b5ed10dc
https://github.com/dyninst/dyninst/commit/6fc136bcbd1cd4ba6188540cd8a105c1b5ed10dc
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/capstone/import.py
Log Message:
-----------
Add mnemonic translation to import script
Commit: e9d73ef21cb4d5f5eea6f799d941f16187545bc1
https://github.com/dyninst/dyninst/commit/e9d73ef21cb4d5f5eea6f799d941f16187545bc1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A instructionAPI/src/x86/register-xlat.C
A instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
Add Capstone->Dyninst register translation
Commit: 41f84e510b769d5c5524edb71461ffb0ef0ed675
https://github.com/dyninst/dyninst/commit/41f84e510b769d5c5524edb71461ffb0ef0ed675
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A instructionAPI/src/x86/mnemonic-xlat.C
A instructionAPI/src/x86/mnemonic-xlat.h
Log Message:
-----------
Add Capstone->Dyninst mnemonic translation
Commit: d46d00d122a421ecb14da05d95efb95e74d059db
https://github.com/dyninst/dyninst/commit/d46d00d122a421ecb14da05d95efb95e74d059db
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
A instructionAPI/src/x86/decoder.C
A instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add stub replacement for x86 decoder
Commit: b7a6f4564184eeabe29569f9c22f6473ab911374
https://github.com/dyninst/dyninst/commit/b7a6f4564184eeabe29569f9c22f6473ab911374
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add decoder ctor and dtor
There is one usage of Capstone per decoder. This should be threadsafe
as it doesn't make sense to use a decoder with multiple threads
simultaneously. See comments in ctor for why there are two Capstone
handles per decoder.
Commit: 0f2565f3603f0389cf4874ae7b4514ec982cc717
https://github.com/dyninst/dyninst/commit/0f2565f3603f0389cf4874ae7b4514ec982cc717
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add decodeOpcode
Commit: 9d4595673bff70f46713d0400ce9915db18ad0d6
https://github.com/dyninst/dyninst/commit/9d4595673bff70f46713d0400ce9915db18ad0d6
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add note in decodeOperands
Commit: bb8d6595e32bf2c9741860d73e820ea86748ae52
https://github.com/dyninst/dyninst/commit/bb8d6595e32bf2c9741860d73e820ea86748ae52
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add doDelayedDecode
This is a copy/paste of Xiaozhu's implementation. It appears to be
incomplete (as per the comments).
Commit: 0450ad9b809ea025e044cfd8e9322dab03154a6b
https://github.com/dyninst/dyninst/commit/0450ad9b809ea025e044cfd8e9322dab03154a6b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
stub -- refactor
Commit: 38b1d0ebe42e8a10a30e0b5f01fa5215629afcf2
https://github.com/dyninst/dyninst/commit/38b1d0ebe42e8a10a30e0b5f01fa5215629afcf2
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Use disassembler object in decode_operands
Commit: fb257eb2cdcfa15832017fcc361bdd48cbf83b87
https://github.com/dyninst/dyninst/commit/fb257eb2cdcfa15832017fcc361bdd48cbf83b87
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Refactor decode_operands
This makes it much easier to follow.
Commit: 3b67e466370cb94cf2cd63dce18a43884404d658
https://github.com/dyninst/dyninst/commit/3b67e466370cb94cf2cd63dce18a43884404d658
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add detailed comments about operand types
Commit: 3feb78f557908a4addc4823b6d5226ab08249933
https://github.com/dyninst/dyninst/commit/3feb78f557908a4addc4823b6d5226ab08249933
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use Instruction::makeReturnExpression
No need to reinvent the wheel.
Commit: 5c0b75131fac6340f40dd9d6a9c6e04c2776ae12
https://github.com/dyninst/dyninst/commit/5c0b75131fac6340f40dd9d6a9c6e04c2776ae12
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove redundant includes
Commit: 211e70c84b794063ab107bad21b613ae66abb1a7
https://github.com/dyninst/dyninst/commit/211e70c84b794063ab107bad21b613ae66abb1a7
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor handling of implicit registers
By giving the properties names rather than std::pairs, it makes it much
easier to read.
Commit: 0a81c0865a795f044a8e2dc5cff4c8b571584071
https://github.com/dyninst/dyninst/commit/0a81c0865a795f044a8e2dc5cff4c8b571584071
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Include decoding of {e,r}flags
Commit: cfb65b0e0f1c270d557bfcc65f559cbdfdc9aa81
https://github.com/dyninst/dyninst/commit/cfb65b0e0f1c270d557bfcc65f559cbdfdc9aa81
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment for explicit operands
Commit: 35a0f1bd1474456122b5ca25079df8358df5d898
https://github.com/dyninst/dyninst/commit/35a0f1bd1474456122b5ca25079df8358df5d898
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix explicit operands example
Commit: 38a65cc64b10292f35ed59c607a41f7068df5a19
https://github.com/dyninst/dyninst/commit/38a65cc64b10292f35ed59c607a41f7068df5a19
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove extraneous namespace qualifier
Commit: 6dfb70821678369ee6074e0191a968b46a6573eb
https://github.com/dyninst/dyninst/commit/6dfb70821678369ee6074e0191a968b46a6573eb
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor is_call
The original code did the nested check, but didn't need to.
if(cat == c_BranchInsn || cat == c_CallInsn) {
isCFT = true;
if(cat == c_CallInsn) {
isCall = true;
}
}
is equivalent to
if(cat == c_CallInsn) {
isCall = true;
}
if(cat == c_BranchInsn || isCall) {
isCFT = true;
}
Commit: aaeff545fa8b9dfbe6f34bfc6a26ae8f6f98c676
https://github.com/dyninst/dyninst/commit/aaeff545fa8b9dfbe6f34bfc6a26ae8f6f98c676
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment in expand_eflags
Commit: b1120d66012f5c528402846e78bb1d959e95389f
https://github.com/dyninst/dyninst/commit/b1120d66012f5c528402846e78bb1d959e95389f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/register-xlat.C
Log Message:
-----------
Fix comment for BND registers
Commit: 127ab10df06c8ce0d37130a58c0b37911912269c
https://github.com/dyninst/dyninst/commit/127ab10df06c8ce0d37130a58c0b37911912269c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_reg
Commit: fed832c77cbfb2b4907de81871831869ffd3ab33
https://github.com/dyninst/dyninst/commit/fed832c77cbfb2b4907de81871831869ffd3ab33
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_imm
Commit: a74e0878d6e1a7d5e53e979be919b4528a8686bc
https://github.com/dyninst/dyninst/commit/a74e0878d6e1a7d5e53e979be919b4528a8686bc
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed 64-bit values for immediates
Commit: 154ca931d108ff739db1ecb213c822e140cad998
https://github.com/dyninst/dyninst/commit/154ca931d108ff739db1ecb213c822e140cad998
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Update comment for relative branch immediates
Commit: 4b7149e7109d35d14d1f882ae8539f9cf9585aba
https://github.com/dyninst/dyninst/commit/4b7149e7109d35d14d1f882ae8539f9cf9585aba
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove error check on size_to_type
It has been updated to include all values used by Capstone.
Commit: 85d60e2dbfb82ded032ac3d8f11443d2325b1755
https://github.com/dyninst/dyninst/commit/85d60e2dbfb82ded032ac3d8f11443d2325b1755
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove unneeded assert
Commit: cab33fb826547d213db9b0edfb6e6840ae4f06b0
https://github.com/dyninst/dyninst/commit/cab33fb826547d213db9b0edfb6e6840ae4f06b0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move is_call and is_cft to where they are used
Commit: 2b9d13263f4253c39be528baedb0bbc9e4716913
https://github.com/dyninst/dyninst/commit/2b9d13263f4253c39be528baedb0bbc9e4716913
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed values for calculations
The manual says everything but the scale can be positive or negative.
Commit: b31386f3a7815235aaf54726062d83aaa2f6814b
https://github.com/dyninst/dyninst/commit/b31386f3a7815235aaf54726062d83aaa2f6814b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use braces
Commit: 267629e15a2c75e474eefbfd861823f8052fc6ed
https://github.com/dyninst/dyninst/commit/267629e15a2c75e474eefbfd861823f8052fc6ed
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move size_to_type to where it is used
Commit: 2696a9acb4117ef991aa93f4a75e714d1033abb1
https://github.com/dyninst/dyninst/commit/2696a9acb4117ef991aa93f4a75e714d1033abb1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add some whitespace
Commit: 02d0bd89cd89fcc46906d097fc36533b88f0ad67
https://github.com/dyninst/dyninst/commit/02d0bd89cd89fcc46906d097fc36533b88f0ad67
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add description from Intel manual
Commit: 1bf5be9596212135fd5a629d62e6c5942096d747
https://github.com/dyninst/dyninst/commit/1bf5be9596212135fd5a629d62e6c5942096d747
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Return early if processing a CFT
Commit: e50c865b51d0923b67621109aba964741fcc99bd
https://github.com/dyninst/dyninst/commit/e50c865b51d0923b67621109aba964741fcc99bd
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add comment about LEA
Commit: 70f93b4a3b81f7bb6d7fa4c1fcb2fd3e704ea4cd
https://github.com/dyninst/dyninst/commit/70f93b4a3b81f7bb6d7fa4c1fcb2fd3e704ea4cd
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Rename immAST -> displacementAST
This better reflects its meaning.
Commit: ca086a56ca07fd654b19181b60a3dd448c8ec1bf
https://github.com/dyninst/dyninst/commit/ca086a56ca07fd654b19181b60a3dd448c8ec1bf
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Handle segment registers as memory operands
Commit: ddc1fdad5c92bafbc3f12d49dd8609ca616d2619
https://github.com/dyninst/dyninst/commit/ddc1fdad5c92bafbc3f12d49dd8609ca616d2619
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Fix cmake formatting in instructionAPI/CMakeLists.txt
Commit: 0c6e79f68208bd31a99c4c9844f82ee10f4de86f
https://github.com/dyninst/dyninst/commit/0c6e79f68208bd31a99c4c9844f82ee10f4de86f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
M docker/dependencies.versions
Log Message:
-----------
Add dependency-version check for Capstone
Commit: ce9d1a8aab28b690ca8c12440525e8bb3461578b
https://github.com/dyninst/dyninst/commit/ce9d1a8aab28b690ca8c12440525e8bb3461578b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Make Capstone a private dependency
Commit: 4f23002b0e32285638af4608789d4ce208a0b0b0
https://github.com/dyninst/dyninst/commit/4f23002b0e32285638af4608789d4ce208a0b0b0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A docker/build_capstone.sh
M docker/dependencies.versions
Log Message:
-----------
Docker: add Capstone builds
Commit: b3eded094332c0a8f2390373c35850f8e8186e21
https://github.com/dyninst/dyninst/commit/b3eded094332c0a8f2390373c35850f8e8186e21
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Only decode segment register operands for i386
Commit: 9db9b0c1c036d60b081f2df1ad1fa57fab9e81d1
https://github.com/dyninst/dyninst/commit/9db9b0c1c036d60b081f2df1ad1fa57fab9e81d1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix format from clang's -Wformat-pedantic
Commit: eddc34e9e9f9cf41a716f7977c58780cc61b3a99
https://github.com/dyninst/dyninst/commit/eddc34e9e9f9cf41a716f7977c58780cc61b3a99
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M cmake/tpls/DyninstCapstone.cmake
Log Message:
-----------
Use correct capitalization for capstone_ROOT in CMake
Commit: 658c2c9af958c9c45eba3a70be1aa594cff4461f
https://github.com/dyninst/dyninst/commit/658c2c9af958c9c45eba3a70be1aa594cff4461f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/h/Architecture.h
M dwarf/src/dwarfHandle.C
Log Message:
-----------
Add riscv architecture
Commit: c93b10700d3c06b6d3756fc2d8b4e2b6059c0633
https://github.com/dyninst/dyninst/commit/c93b10700d3c06b6d3756fc2d8b4e2b6059c0633
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A instructionAPI/capstone/capstone.py
M instructionAPI/capstone/import.py
A instructionAPI/capstone/riscv64.py
Log Message:
-----------
Add riscv64 capstone parser
Commit: 377869339edaaf74c6acde84ea7bd04273bfba44
https://github.com/dyninst/dyninst/commit/377869339edaaf74c6acde84ea7bd04273bfba44
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/CMakeLists.txt
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/h/mnemonics/riscv64_entryIDs.h
A common/h/registers/riscv64_regs.h
A common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add RISC-V registers and mnemonics
Commit: 3504635954c4194cfd45db6c683da6bfeaac676d
https://github.com/dyninst/dyninst/commit/3504635954c4194cfd45db6c683da6bfeaac676d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M elf/src/Elf_X.C
M proccontrol/src/process.C
Log Message:
-----------
Add cases for Arch_riscv64 to suppress compiler warnings
Commit: 93afca36359f6c387361e391863f03a02eea37b4
https://github.com/dyninst/dyninst/commit/93afca36359f6c387361e391863f03a02eea37b4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
M instructionAPI/capstone/import.py
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
A instructionAPI/src/InstructionDecoder-Capstone.C
A instructionAPI/src/InstructionDecoder-Capstone.h
A instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/InstructionDecoderImpl.C
Log Message:
-----------
Add Capstone-based RISC-V InstructionAPI
Commit: 25366c08ac0c7f098fcef4af8cd0a67d0685aeac
https://github.com/dyninst/dyninst/commit/25366c08ac0c7f098fcef4af8cd0a67d0685aeac
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M parseAPI/CMakeLists.txt
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
A parseAPI/src/IA_riscv64.C
A parseAPI/src/IA_riscv64.h
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Add RISC-V ParseAPI
Commit: a0f851ae43083ea37eff661a2286ee80dca62a55
https://github.com/dyninst/dyninst/commit/a0f851ae43083ea37eff661a2286ee80dca62a55
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dataflowAPI/rose/SgAsmRiscv64Instruction.h
M dataflowAPI/rose/conversions.h
A dataflowAPI/rose/semantics/DispatcherRiscv64.C
A dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/RoseInsnFactory.h
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
A external/rose/riscv64InstructionEnum.h
M external/rose/rose-compat.h
Log Message:
-----------
Implement RISC-V DataflowAPI base code
Commit: 01add55034181180dbd05bea1369288771e30a7b
https://github.com/dyninst/dyninst/commit/01add55034181180dbd05bea1369288771e30a7b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dataflowAPI/sail/riscv_sail_to_rose.pl
A dataflowAPI/sail/sail_ast.pl
A dataflowAPI/sail/sail_lex.pl
A dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add sail lexical parser
Commit: 6cb7d81dd2fc5acfbb15a63877a1f7b3f49062d4
https://github.com/dyninst/dyninst/commit/6cb7d81dd2fc5acfbb15a63877a1f7b3f49062d4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
rewrite sail lexer using regex
Commit: 012cb06f4e1c41fda78ac1b6f6b482f1c408050f
https://github.com/dyninst/dyninst/commit/012cb06f4e1c41fda78ac1b6f6b482f1c408050f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
Use array instead of hash
Commit: e473530c9cab4fd9583bc22b95a0ab4c8702b9ca
https://github.com/dyninst/dyninst/commit/e473530c9cab4fd9583bc22b95a0ab4c8702b9ca
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add most syntax
Commit: 4bb2e36816d97f84c41614002c1cf6e4003c5f9f
https://github.com/dyninst/dyninst/commit/4bb2e36816d97f84c41614002c1cf6e4003c5f9f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dataflowAPI/sail/riscv_ast.json
R dataflowAPI/sail/riscv_sail_to_rose.pl
R dataflowAPI/sail/sail_ast.pl
R dataflowAPI/sail/sail_lex.pl
R dataflowAPI/sail/sail_syntax.pl
A dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (UTYPE)
Commit: 3cf641133447b966337383192d31983caf992b9c
https://github.com/dyninst/dyninst/commit/3cf641133447b966337383192d31983caf992b9c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/h/Architecture.h
Log Message:
-----------
Add missing riscv64 address width
Commit: 09070ffedf7f2128a94e91616d5475cf4870ff78
https://github.com/dyninst/dyninst/commit/09070ffedf7f2128a94e91616d5475cf4870ff78
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (IMAC subsets)
Commit: 6c9eaeebe622af9b5d1e27f68826b37475e31475
https://github.com/dyninst/dyninst/commit/6c9eaeebe622af9b5d1e27f68826b37475e31475
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Integrate riscv64 ROSE code into dataflowAPI
Commit: 21d29dbc5ade48b2c174d14d7c853c5c915a9997
https://github.com/dyninst/dyninst/commit/21d29dbc5ade48b2c174d14d7c853c5c915a9997
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
R instructionAPI/src/x86/decoder.C
R instructionAPI/src/x86/decoder.h
R instructionAPI/src/x86/mnemonic-xlat.C
R instructionAPI/src/x86/mnemonic-xlat.h
R instructionAPI/src/x86/register-xlat.C
R instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
migrate instructionAPI to capstone
Commit: 97025b41b26bc8796200bbc375c0cfb1f95a0a5f
https://github.com/dyninst/dyninst/commit/97025b41b26bc8796200bbc375c0cfb1f95a0a5f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/BaseSemantics2.h
A dataflowAPI/rose/semantics/ConcreteSemantics2.C
A dataflowAPI/rose/semantics/ConcreteSemantics2.h
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/SymEvalPolicy.h
Log Message:
-----------
fix mulhsu instruction semantic
Commit: 37e3800fc74d41b139d464d4d0c8635a3de4454a
https://github.com/dyninst/dyninst/commit/37e3800fc74d41b139d464d4d0c8635a3de4454a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M cmake/DyninstPlatform.cmake
M cmake/tpls/DyninstCapstone.cmake
M common/CMakeLists.txt
A common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/src/ABI.C
M dataflowAPI/src/RegisterMap.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
A dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
A dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
A dyninstAPI/src/codegen-riscv64.C
A dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.h
A dyninstAPI/src/emit-riscv64.C
A dyninstAPI/src/emit-riscv64.h
A dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/mapped_object.C
A dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
M dyninstAPI_RT/CMakeLists.txt
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/CMakeLists.txt
M proccontrol/src/linux.C
M proccontrol/src/linux.h
A proccontrol/src/loadLibrary/codegen-riscv64.C
M proccontrol/src/loadLibrary/codegen.C
M proccontrol/src/loadLibrary/codegen.h
A proccontrol/src/riscv_process.C
A proccontrol/src/riscv_process.h
Log Message:
-----------
Add RISC-V guards
Commit: 1c7bbfabf0e39feca1864ce2e91972c03a9ebd77
https://github.com/dyninst/dyninst/commit/1c7bbfabf0e39feca1864ce2e91972c03a9ebd77
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/function.h
M dyninstAPI/src/linux.C
M stackwalk/CMakeLists.txt
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/framestepper.C
A stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/linux-swk.C
A stackwalk/src/riscv64-swk.C
A stackwalk/src/riscv64-swk.h
M symtabAPI/CMakeLists.txt
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add RISC-V stackwalk guard
Commit: 7c62ed1d04c0f1bf8ba1fe7c95c3e5359db09c57
https://github.com/dyninst/dyninst/commit/7c62ed1d04c0f1bf8ba1fe7c95c3e5359db09c57
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dyninstAPI_RT/src/RTthread-riscv64.c
Log Message:
-----------
Add missing RTthread-riscv64.c
Commit: 279f66ba13cd02c2c4c1472c4dbaf5b2c458bbef
https://github.com/dyninst/dyninst/commit/279f66ba13cd02c2c4c1472c4dbaf5b2c458bbef
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A symtabAPI/src/emitElfStatic-riscv64.C
A symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Create RISC-V emitter template
Commit: 63fa2c189a80fcfe7ff425522eeffcc15ba21802
https://github.com/dyninst/dyninst/commit/63fa2c189a80fcfe7ff425522eeffcc15ba21802
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dyninstAPI_RT/src/RTstatic_ctors_dtors-riscv64.c
Log Message:
-----------
Add missing RTstatic_ctors_dtors-riscv64.c
Commit: f68372157af2bd112e808ccd6d42e5910b298641
https://github.com/dyninst/dyninst/commit/f68372157af2bd112e808ccd6d42e5910b298641
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dataflowAPI/src/RegisterMap.h
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/RegisterConversion-riscv64.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
A dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/linux-riscv64.C
A dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-riscv64.C
M dyninstAPI/src/unix.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/src/emitElfStatic-stub.C
Log Message:
-----------
Make RISC-V dyninst compile on a RISC-V machine
Commit: cbe990fe08b6cdff3069e07413e85ca1f4696e0a
https://github.com/dyninst/dyninst/commit/cbe990fe08b6cdff3069e07413e85ca1f4696e0a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
Log Message:
-----------
Implement some instruction emission functions
Commit: 1d1cc22664f921dc2d7a03a36893da8cd6bd0d71
https://github.com/dyninst/dyninst/commit/1d1cc22664f921dc2d7a03a36893da8cd6bd0d71
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/registerSpace.h
M external/rose/riscv64InstructionEnum.h
Log Message:
-----------
Amalgamate 32 and 64 bit fpr
Commit: 11fde392a9ad2edc6b856e30133f41e52aafa0f1
https://github.com/dyninst/dyninst/commit/11fde392a9ad2edc6b856e30133f41e52aafa0f1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Add emitImm
Commit: db90f4191455360376e256e3ad8b12de791faa92
https://github.com/dyninst/dyninst/commit/db90f4191455360376e256e3ad8b12de791faa92
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/ABI.C
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/src/linux.C
M stackwalk/src/dbginfo-stepper.C
Log Message:
-----------
Rename arch_riscv64 to DYNINST_HOST_ARCH_AARCH64
Commit: acb4c405d24aa76e605b7afe4ee87bd02cac2557
https://github.com/dyninst/dyninst/commit/acb4c405d24aa76e605b7afe4ee87bd02cac2557
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/CMakeLists.txt
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/convert.C
A dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/convertOpcodes.C
M dwarf/CMakeLists.txt
M dwarf/src/registers/convert.C
A dwarf/src/registers/riscv64.h
M dyninstAPI/src/inst-riscv64.h
M external/rose/riscv64InstructionEnum.h
M parseAPI/CMakeLists.txt
Log Message:
-----------
Add missing RISC-V ROSE register conversion
Commit: ff28f28a85852d4ed6e983aacbca8f71559b1221
https://github.com/dyninst/dyninst/commit/ff28f28a85852d4ed6e983aacbca8f71559b1221
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Add missing invalid operand check
Commit: 6ab36afccacb8b59ffc4705139faacb69756b5b0
https://github.com/dyninst/dyninst/commit/6ab36afccacb8b59ffc4705139faacb69756b5b0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/RoseInsnFactory.h
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/mapped_object.C
M instructionAPI/h/Instruction.h
M instructionAPI/src/InstructionDecoder-Capstone.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/interrupts.C
M instructionAPI/src/syscalls.C
M parseAPI/CMakeLists.txt
M parseAPI/src/IA_riscv64.C
M stackwalk/CMakeLists.txt
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
Log Message:
-----------
Modify RISC-V Capstone instruction decoder
Commit: 08efdfba5d178fd8fbe1073aa6202f791ccf3249
https://github.com/dyninst/dyninst/commit/08efdfba5d178fd8fbe1073aa6202f791ccf3249
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add C-Type Emitter
Commit: 9c9003f764c6ae3a7053b930bbb1764b6caef1cd
https://github.com/dyninst/dyninst/commit/9c9003f764c6ae3a7053b930bbb1764b6caef1cd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add Load Immediate
Commit: 11b02e90ef9b835653433c1e5790a0324aecf600
https://github.com/dyninst/dyninst/commit/11b02e90ef9b835653433c1e5790a0324aecf600
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Change insn_size to is_compressed
Commit: 5a22971c288b83f23cc0321d6d6d11a5eb55f3e0
https://github.com/dyninst/dyninst/commit/5a22971c288b83f23cc0321d6d6d11a5eb55f3e0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add addi codegen
Commit: b076549280d0351fcffcc9200dd324ab2acfc5ae
https://github.com/dyninst/dyninst/commit/b076549280d0351fcffcc9200dd324ab2acfc5ae
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Optimize addi Code Generation
Commit: 07f49410eacae2450983bc9456ea1a96e9f8584c
https://github.com/dyninst/dyninst/commit/07f49410eacae2450983bc9456ea1a96e9f8584c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI/CMakeLists.txt
M dyninstAPI_RT/CMakeLists.txt
Log Message:
-----------
Fix DYNINST_ARCH_riscv64
Commit: bb2e679f35f753359a37b5d455eb2492a5ba0849
https://github.com/dyninst/dyninst/commit/bb2e679f35f753359a37b5d455eb2492a5ba0849
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/ABI.C
Log Message:
-----------
Add RISC-V initialize64
Commit: e5984333359176e043bdc348b2f6a8181c1b5638
https://github.com/dyninst/dyninst/commit/e5984333359176e043bdc348b2f6a8181c1b5638
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Parsing-arch.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-aarch64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/parse-cfg.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/CMakeLists.txt
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Rebase and fix code generation
Commit: 016c65491c53b21c2ceeb9a73394db8b32b3b71b
https://github.com/dyninst/dyninst/commit/016c65491c53b21c2ceeb9a73394db8b32b3b71b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V jump instruction generation
Commit: 10b355336068ffba1c8cb7673477491bc79bfdb6
https://github.com/dyninst/dyninst/commit/10b355336068ffba1c8cb7673477491bc79bfdb6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/linux-riscv64-swk.C
Log Message:
-----------
Change gregs to __gregs
Commit: 72a35358ae0479db65518171575a2809f4f7f88f
https://github.com/dyninst/dyninst/commit/72a35358ae0479db65518171575a2809f4f7f88f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V Long Branch
Commit: ed9b6b8fb21f702894fa6de69646b92fca471a23
https://github.com/dyninst/dyninst/commit/ed9b6b8fb21f702894fa6de69646b92fca471a23
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite shifts and constants in RISC-V codegen
Commit: b9adbe2f8b5912b6d8b6d6a466d24c0344ab886f
https://github.com/dyninst/dyninst/commit/b9adbe2f8b5912b6d8b6d6a466d24c0344ab886f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix wrong indexing order in INSN_SET
Commit: d3c2ba3099e3992de5f90fa9f6e3a0b2f7d28e03
https://github.com/dyninst/dyninst/commit/d3c2ba3099e3992de5f90fa9f6e3a0b2f7d28e03
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite load and store using I-Type and S-Type generator
Commit: b281a05f0d1e60b7bfd1dde4266d230e16c4a7c5
https://github.com/dyninst/dyninst/commit/b281a05f0d1e60b7bfd1dde4266d230e16c4a7c5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Finish emit basic operators
Commit: 772e4ff495f74fb3219bfd3bf45dee77904a411a
https://github.com/dyninst/dyninst/commit/772e4ff495f74fb3219bfd3bf45dee77904a411a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Add conditional branch
Commit: 1d5c537bbb4e0e6a853191e6ae26bd3e48dcdc9f
https://github.com/dyninst/dyninst/commit/1d5c537bbb4e0e6a853191e6ae26bd3e48dcdc9f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish emit-riscv64.C
Commit: 40c60b69025861f73f6fb8023d230321268f3edd
https://github.com/dyninst/dyninst/commit/40c60b69025861f73f6fb8023d230321268f3edd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
M dataflowAPI/rose/registers/convert.C
M dataflowAPI/rose/registers/riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish inst-riscv64.C
Commit: e86766391159b428fb75320d91eac2d9d894d215
https://github.com/dyninst/dyninst/commit/e86766391159b428fb75320d91eac2d9d894d215
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
Log Message:
-----------
Rewrite RISC-V Branch
Commit: 4e5b2559238b884021cfcbf861c46aaef5b52afe
https://github.com/dyninst/dyninst/commit/4e5b2559238b884021cfcbf861c46aaef5b52afe
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Make dyninstAPI compile
Commit: 45d30870bad1a9facd85ae419eb419d7a8715919
https://github.com/dyninst/dyninst/commit/45d30870bad1a9facd85ae419eb419d7a8715919
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Update MachRegister
Commit: b0b853c64264184f2372f1c1350c3713e9cf54e9
https://github.com/dyninst/dyninst/commit/b0b853c64264184f2372f1c1350c3713e9cf54e9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M parseAPI/h/CFGModifier.h
M parseAPI/src/BoundFactCalculator.C
Log Message:
-----------
Fixed missing RISC-V BoundFact
Commit: b5c6fea395cdd9dafcf86acd81103c35148a25f9
https://github.com/dyninst/dyninst/commit/b5c6fea395cdd9dafcf86acd81103c35148a25f9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Incorrect plt entry
Commit: 4dc09a7270b81778c75d72164c0ad6b4e450111d
https://github.com/dyninst/dyninst/commit/4dc09a7270b81778c75d72164c0ad6b4e450111d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A instructionAPI/src/.gdb_history
M instructionAPI/src/InstructionCategories.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix RISC-V bugs in Instruction API
Commit: 11a9585a49fb9a75074a357aeb3dbe1d904de72b
https://github.com/dyninst/dyninst/commit/11a9585a49fb9a75074a357aeb3dbe1d904de72b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
M instructionAPI/h/Operation_impl.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix some bugs
Commit: 8e65a876687893bd0e59b6fdd68e891d2a819073
https://github.com/dyninst/dyninst/commit/8e65a876687893bd0e59b6fdd68e891d2a819073
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix Segfault in pointer casting
Commit: bec3a2bcc39d906b958899f7cf6dc030f8b7065e
https://github.com/dyninst/dyninst/commit/bec3a2bcc39d906b958899f7cf6dc030f8b7065e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/registers/riscv64.h
Log Message:
-----------
Fix ROSE register conversion I forgot to change after rebase
Commit: 382bad70e1db098612684d4543d3595e26b9bb60
https://github.com/dyninst/dyninst/commit/382bad70e1db098612684d4543d3595e26b9bb60
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add register massaging to jalr
Commit: 2688c4ecf9311f4454ad99c5d9efb971cdf41ce0
https://github.com/dyninst/dyninst/commit/2688c4ecf9311f4454ad99c5d9efb971cdf41ce0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/registerSpace.h
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix jr instruction and incorrect fp
Commit: 1135b8d6500acf63d7d73fdbe9f94d6123fc3c20
https://github.com/dyninst/dyninst/commit/1135b8d6500acf63d7d73fdbe9f94d6123fc3c20
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Revert wrong readRegister fix
Commit: 4cd57d1a911eea7e04f5804ee4486c0a10e00912
https://github.com/dyninst/dyninst/commit/4cd57d1a911eea7e04f5804ee4486c0a10e00912
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/Instruction.C
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Fix isReturn bug
Commit: 66bff9b4186639db075a57031a34a04b21c32662
https://github.com/dyninst/dyninst/commit/66bff9b4186639db075a57031a34a04b21c32662
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
Log Message:
-----------
Fixed ud2 in RegisterMap
Commit: 598e938b2c75a5070a1dbe0a6a4a7d6e6307900a
https://github.com/dyninst/dyninst/commit/598e938b2c75a5070a1dbe0a6a4a7d6e6307900a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Add riscv attribute
Commit: ddf012bae6f2a8a60ce8fffd135542a5be8c9501
https://github.com/dyninst/dyninst/commit/ddf012bae6f2a8a60ce8fffd135542a5be8c9501
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Make Dyninst recognize .riscv.attributes
Commit: b1c7e69797f2a53f2a9e5be258df781b2fc2ead4
https://github.com/dyninst/dyninst/commit/b1c7e69797f2a53f2a9e5be258df781b2fc2ead4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix bug parsing .riscv.attributes
Commit: 72bfd107b517012093da5c037d3eb008926d4e60
https://github.com/dyninst/dyninst/commit/72bfd107b517012093da5c037d3eb008926d4e60
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Fix incorrect relocation category
Commit: b466aa7bd8a3350527be30a0b7ba84a9a07cf4e3
https://github.com/dyninst/dyninst/commit/b466aa7bd8a3350527be30a0b7ba84a9a07cf4e3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Don't know why I missed getRelTypeByElfMachine
Commit: 342ed6e736a239b3dc6671ec4799420642fffaef
https://github.com/dyninst/dyninst/commit/342ed6e736a239b3dc6671ec4799420642fffaef
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
ifdef for libelf compatilibity
Commit: af04fd8f2590aa592fce989b37aa8b8847f7e4ca
https://github.com/dyninst/dyninst/commit/af04fd8f2590aa592fce989b37aa8b8847f7e4ca
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add library adjust
Commit: 108cce0273755e96f6f11ecc3ee91db1985af763
https://github.com/dyninst/dyninst/commit/108cce0273755e96f6f11ecc3ee91db1985af763
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add preinit array
Commit: c9cdfec81a07dd42990eaf04574096510fab278e
https://github.com/dyninst/dyninst/commit/c9cdfec81a07dd42990eaf04574096510fab278e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Fix incorrect uleb128 parsing
Commit: bff071935bc663f77cb1709f7b9cdb8d555befc4
https://github.com/dyninst/dyninst/commit/bff071935bc663f77cb1709f7b9cdb8d555befc4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix tag variable shadowing
Commit: 2a8d432a2c1568dab1de9f2467fbf5b025b23cc9
https://github.com/dyninst/dyninst/commit/2a8d432a2c1568dab1de9f2467fbf5b025b23cc9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Null instrumentation now works
Commit: 816c42ea9db98e425081f17310d5225974bf3e8a
https://github.com/dyninst/dyninst/commit/816c42ea9db98e425081f17310d5225974bf3e8a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix incorrect parentheses and generateLoadImm
Commit: 6d1c9bc254282957e7aadd948fb89ea07e7d2ded
https://github.com/dyninst/dyninst/commit/6d1c9bc254282957e7aadd948fb89ea07e7d2ded
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
is_compressed should be true for C instructions
Commit: 84c9a20d1473eda5f68ae5ded5cc8fe7e8a9b813
https://github.com/dyninst/dyninst/commit/84c9a20d1473eda5f68ae5ded5cc8fe7e8a9b813
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Fix inconsistency between Capstone and ROSE
Commit: 190136bccef5a87537907c0bbe0b35ee1102feb9
https://github.com/dyninst/dyninst/commit/190136bccef5a87537907c0bbe0b35ee1102feb9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Hardwire x0 to 0
Commit: 97ada38395c833c60ed141d84941893620e3e804
https://github.com/dyninst/dyninst/commit/97ada38395c833c60ed141d84941893620e3e804
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-aarch64.C
Log Message:
-----------
Readd disappeared codegen in aarch64
Commit: c2f08771b9e850a6ca5e825b5f135330498c3285
https://github.com/dyninst/dyninst/commit/c2f08771b9e850a6ca5e825b5f135330498c3285
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
emitLoadRelative and emitStoreRelative should be implemented
Commit: e7124833f164ee5b7274fc1d7e7bae3dd0fd37b9
https://github.com/dyninst/dyninst/commit/e7124833f164ee5b7274fc1d7e7bae3dd0fd37b9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
remove evil constants
Commit: c9d59ee9af0521938702fcf302ca555cfaf574e4
https://github.com/dyninst/dyninst/commit/c9d59ee9af0521938702fcf302ca555cfaf574e4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
Log Message:
-----------
RISC-V CFWidget
Commit: 35defd024a2bbb27fe4d403960b42688758e3d30
https://github.com/dyninst/dyninst/commit/35defd024a2bbb27fe4d403960b42688758e3d30
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
Log Message:
-----------
RISC-V PCWidget
Commit: 3a0938c20bf7a956eeed4c77c1ac472637c8fd21
https://github.com/dyninst/dyninst/commit/3a0938c20bf7a956eeed4c77c1ac472637c8fd21
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
Log Message:
-----------
Add flag to compressed instructions generation
Commit: c046fa6a205860e5a926ea04cb9511723d039178
https://github.com/dyninst/dyninst/commit/c046fa6a205860e5a926ea04cb9511723d039178
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/emit-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/req.txt
Log Message:
-----------
Huge update
Commit: b5be183d60e825d5f52cea8bb50e5c18c2f7aa55
https://github.com/dyninst/dyninst/commit/b5be183d60e825d5f52cea8bb50e5c18c2f7aa55
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-aarch64.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Split codegen into multiple of 16 bits
Commit: baffadd5651a5048d89819c2c515cef33f31a8ec
https://github.com/dyninst/dyninst/commit/baffadd5651a5048d89819c2c515cef33f31a8ec
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix indexing issue
Commit: 963fa3d39a7fdc3bf956ea847b67eaa033167a51
https://github.com/dyninst/dyninst/commit/963fa3d39a7fdc3bf956ea847b67eaa033167a51
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix RISC-V ret bugs
Commit: 13bb7a75630a4480f2ef57b77d39a28a01c4eee9
https://github.com/dyninst/dyninst/commit/13bb7a75630a4480f2ef57b77d39a28a01c4eee9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Fix stack and instruction bugs
Commit: 77d50a0d0fb3facb4c7deaed0555aa460e807c25
https://github.com/dyninst/dyninst/commit/77d50a0d0fb3facb4c7deaed0555aa460e807c25
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix long branch bug
Commit: dfef90687c981f39bc84def037e03bc31f6a91d9
https://github.com/dyninst/dyninst/commit/dfef90687c981f39bc84def037e03bc31f6a91d9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add modifyData and fix auipc jalr bug
Commit: 838613de40207b7b4d40dffeabbba6634b01ecd9
https://github.com/dyninst/dyninst/commit/838613de40207b7b4d40dffeabbba6634b01ecd9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M proccontrol/src/riscv_process.C
Log Message:
-----------
Add Marco's patch
Commit: 01ab0a395ca2547689714878220eded714d57770
https://github.com/dyninst/dyninst/commit/01ab0a395ca2547689714878220eded714d57770
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Change PC to read PC register
Commit: 51c05211add2870e31ba6d1968540d296155ef24
https://github.com/dyninst/dyninst/commit/51c05211add2870e31ba6d1968540d296155ef24
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Patch RISC-V SAIL parser
Commit: f5773628ad73db48f3cc0240d4c60952e87580f9
https://github.com/dyninst/dyninst/commit/f5773628ad73db48f3cc0240d4c60952e87580f9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Fix parse_riscv_attribute API
Commit: 2059cf26d579ae816602fe635aefbe0a37143905
https://github.com/dyninst/dyninst/commit/2059cf26d579ae816602fe635aefbe0a37143905
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
M parseAPI/src/IA_riscv64.C
M proccontrol/src/riscv_process.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Fix include arch-riscv64.h
Commit: 6e0cf9abd79d0f3fa249e19667eca44fefc4d655
https://github.com/dyninst/dyninst/commit/6e0cf9abd79d0f3fa249e19667eca44fefc4d655
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Revert emitElfStatic-riscv64.C
Commit: 5444e46c5ec31819a22750c4247a6595ceb95977
https://github.com/dyninst/dyninst/commit/5444e46c5ec31819a22750c4247a6595ceb95977
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M proccontrol/src/riscv_process.C
Log Message:
-----------
Fix Object ELF
Commit: 4cb7aa5041df4bddafacbac025cce19e6ef97635
https://github.com/dyninst/dyninst/commit/4cb7aa5041df4bddafacbac025cce19e6ef97635
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M parseAPI/h/CodeSource.h
M parseAPI/h/InstructionAdapter.h
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_riscv64.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/SymtabCodeSource.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Solve RISC-V PLT issue
Commit: f7910c85530d1f5453221b83a4e03127aa0056e2
https://github.com/dyninst/dyninst/commit/f7910c85530d1f5453221b83a4e03127aa0056e2
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
64 ->XLENBITS
Commit: cde5b4fcd2abb73a5240abb92207f05c124cfa2a
https://github.com/dyninst/dyninst/commit/cde5b4fcd2abb73a5240abb92207f05c124cfa2a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite constant constraints
Commit: 4b91c629e49e4644f9ebb6708762a1c56da519da
https://github.com/dyninst/dyninst/commit/4b91c629e49e4644f9ebb6708762a1c56da519da
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Implement missing memory codegen and fix wrong emitImm
Commit: 5f76ab5aa7c6f44ec2a63c3dc574dc46b572f7ca
https://github.com/dyninst/dyninst/commit/5f76ab5aa7c6f44ec2a63c3dc574dc46b572f7ca
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add missing instructions in instructionAPI
Commit: 5b97899bde7a282d5f60649593b2149b4bf68c2b
https://github.com/dyninst/dyninst/commit/5b97899bde7a282d5f60649593b2149b4bf68c2b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix c.lui
Commit: be2e627a0830ae00948cfc86faaf67a90bf14040
https://github.com/dyninst/dyninst/commit/be2e627a0830ae00948cfc86faaf67a90bf14040
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Correct storing registers in emitCall
Commit: 132f7b43ac762bea642ed66cf8de28733a71383e
https://github.com/dyninst/dyninst/commit/132f7b43ac762bea642ed66cf8de28733a71383e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add missing atomic instruction in InstructionAPI
Commit: 2ea2002b42f4e39e71223b4f96e948127eb9cebb
https://github.com/dyninst/dyninst/commit/2ea2002b42f4e39e71223b4f96e948127eb9cebb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix inter modular function address
Commit: ec4786315b36321860cc0549f8b31dc14664891d
https://github.com/dyninst/dyninst/commit/ec4786315b36321860cc0549f8b31dc14664891d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Add branch via trap for RISC-V
Commit: 1fe39aced1445d6011406f67e5f360681aab3fd6
https://github.com/dyninst/dyninst/commit/1fe39aced1445d6011406f67e5f360681aab3fd6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Pull register space from address space
Commit: edd6bdd90f2ead65337f32b0ef3d4376cc51debe
https://github.com/dyninst/dyninst/commit/edd6bdd90f2ead65337f32b0ef3d4376cc51debe
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
Log Message:
-----------
Fix wrong ElfX_Dyn
Commit: 3321870f8c562ab65f616ac65aa042411c76660a
https://github.com/dyninst/dyninst/commit/3321870f8c562ab65f616ac65aa042411c76660a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix call instruction codegen bugs
Commit: 956fb97b6d86f320dc29f80fa696cb03adafb241
https://github.com/dyninst/dyninst/commit/956fb97b6d86f320dc29f80fa696cb03adafb241
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix lui signedness problem
Commit: 371eb206f410994b94ff1d7ba1e8544fa5c5b8d5
https://github.com/dyninst/dyninst/commit/371eb206f410994b94ff1d7ba1e8544fa5c5b8d5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Minor adjustment in RISCV emitElfStatic
Commit: 0b5659a0ac39fda1911354b7d0257981794eabdf
https://github.com/dyninst/dyninst/commit/0b5659a0ac39fda1911354b7d0257981794eabdf
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Add missing addressWidth
Commit: bbbe7daf7006a2c0543a506e653c5355612a4a89
https://github.com/dyninst/dyninst/commit/bbbe7daf7006a2c0543a506e653c5355612a4a89
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen.C
Log Message:
-----------
Variable length buffer
Commit: 73e6dc4310df7be55cb9012addb4027cbc35de20
https://github.com/dyninst/dyninst/commit/73e6dc4310df7be55cb9012addb4027cbc35de20
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix incorrect offset in emitCall and emitLoadShared
Commit: 18da7c8564b7edfa540b65f816efa34664bbd56d
https://github.com/dyninst/dyninst/commit/18da7c8564b7edfa540b65f816efa34664bbd56d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
beq to bne
Commit: 021754e2a9417efa475778a4fbd380d210598729
https://github.com/dyninst/dyninst/commit/021754e2a9417efa475778a4fbd380d210598729
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M instructionAPI/src/InstructionDecoder-Capstone.C
Log Message:
-----------
Fix indentation
Commit: d47cd4cc808e74c57a7d18bb49cfa16292ca6a31
https://github.com/dyninst/dyninst/commit/d47cd4cc808e74c57a7d18bb49cfa16292ca6a31
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Improve immediate calculation algorithm
Commit: bab6d9a124710079fb5714dfa8fadd896944ebcc
https://github.com/dyninst/dyninst/commit/bab6d9a124710079fb5714dfa8fadd896944ebcc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Remove optimization for relative load store
Commit: 812b9cf6911068ae90ca9737cbc0dfa52b62e67c
https://github.com/dyninst/dyninst/commit/812b9cf6911068ae90ca9737cbc0dfa52b62e67c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix conditional branch offset error
Commit: cbf7f10abe207f6efdc53d7f1f6a9579fd86268d
https://github.com/dyninst/dyninst/commit/cbf7f10abe207f6efdc53d7f1f6a9579fd86268d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix jump offset
Commit: c21d37a23748e9a39ff05640eb097c1c62a94edc
https://github.com/dyninst/dyninst/commit/c21d37a23748e9a39ff05640eb097c1c62a94edc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Fix jump target in emitIf
Commit: 681fbeefe8f008e39cf20a51a4ae73683b4139b0
https://github.com/dyninst/dyninst/commit/681fbeefe8f008e39cf20a51a4ae73683b4139b0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Tail Call
Commit: fabca4b3ff9d68cb4a18d4844bd7b00eb80f4a7e
https://github.com/dyninst/dyninst/commit/fabca4b3ff9d68cb4a18d4844bd7b00eb80f4a7e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/registers/riscv64.h
Log Message:
-----------
Fix typo
Commit: 6069b31f2f39a5eac801f3a9629d82dddeee4a3e
https://github.com/dyninst/dyninst/commit/6069b31f2f39a5eac801f3a9629d82dddeee4a3e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A dataflowAPI/sail/experimental/sail_semantics.json
A dataflowAPI/sail/experimental/sail_to_rose.pl
Log Message:
-----------
Add Experimental SAIL parser
Commit: 9e6c94b6a57189d0b2fd4b2eb64b7f7b085e0f60
https://github.com/dyninst/dyninst/commit/9e6c94b6a57189d0b2fd4b2eb64b7f7b085e0f60
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/ABI.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
Log Message:
-----------
Support DYNINST_CODEGEN_ARCH_RISCV64
Commit: 4cceed7ec8db97db219ddc2e5059a231a27e2897
https://github.com/dyninst/dyninst/commit/4cceed7ec8db97db219ddc2e5059a231a27e2897
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI_RT/src/RTlinux.c
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add missing CODEGEN
Commit: b5d6d4184c67a47490633d10bb41d900e8239a3b
https://github.com/dyninst/dyninst/commit/b5d6d4184c67a47490633d10bb41d900e8239a3b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/unix.C
Log Message:
-----------
Disallow generating _init and _fini
Commit: c1619abadb9d4d3817a382e48d11bb05c8cb1950
https://github.com/dyninst/dyninst/commit/c1619abadb9d4d3817a382e48d11bb05c8cb1950
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Add c.ebreak
Commit: 96b73323365eb71f3f6b75b484b8e78f63ce402f
https://github.com/dyninst/dyninst/commit/96b73323365eb71f3f6b75b484b8e78f63ce402f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
Log Message:
-----------
Remove annonying tab from github workflow
Commit: 42756dbccdba3e5c941e827b53ab1afa632d754c
https://github.com/dyninst/dyninst/commit/42756dbccdba3e5c941e827b53ab1afa632d754c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object.C
M symtabAPI/src/Object.h
Log Message:
-----------
Add MAFD extension detection
Commit: 190d899dbe542d2ba28a666bdc5f069dd2540a4f
https://github.com/dyninst/dyninst/commit/190d899dbe542d2ba28a666bdc5f069dd2540a4f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/src/AbslocInterface.C
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Add special handling for convert
Commit: fac40ff466e7f19f1fc2c8ffe59b3d8edcee27e9
https://github.com/dyninst/dyninst/commit/fac40ff466e7f19f1fc2c8ffe59b3d8edcee27e9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dyninstAPI/src/Relocation/Springboard.C
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/addressSpace.C
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
Log Message:
-----------
Use compressed instruction info
Commit: 3bbd5b109adc24ee30b320ed07c7bc923aa05d36
https://github.com/dyninst/dyninst/commit/3bbd5b109adc24ee30b320ed07c7bc923aa05d36
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M parseAPI/h/CodeSource.h
M parseAPI/h/InstructionAdapter.h
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/SymtabCodeSource.C
Log Message:
-----------
Add basic RISC-V pattern matching in ParseAPI, for efficiency
Commit: 3f50de7bc1addd685be61d56fe89ed686af4992b
https://github.com/dyninst/dyninst/commit/3f50de7bc1addd685be61d56fe89ed686af4992b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M instructionAPI/h/Operation_impl.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/Operation.C
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_aarch64.C
M parseAPI/src/IA_aarch64.h
M parseAPI/src/IA_amdgpu.C
M parseAPI/src/IA_amdgpu.h
M parseAPI/src/IA_power.C
M parseAPI/src/IA_power.h
M parseAPI/src/IA_riscv64.C
M parseAPI/src/IA_riscv64.h
M parseAPI/src/IA_x86.C
M parseAPI/src/IA_x86.h
Log Message:
-----------
Move multi instruction jump to separate function
Commit: 14a02901b2c596846ee0a64fe215216901e3347e
https://github.com/dyninst/dyninst/commit/14a02901b2c596846ee0a64fe215216901e3347e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/BPatch_object.C
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/unix.C
M dyninstAPI_RT/h/dyninstAPI_RT.h
M dyninstAPI_RT/src/RTfreebsd.c
M dyninstAPI_RT/src/RTlinux.c
M parseAPI/h/CodeSource.h
M parseAPI/src/SymtabCodeSource.C
M symtabAPI/h/Region.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Region.C
M symtabAPI/src/Symtab.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Experimental: use .init_array instead of _init
Commit: 8c177b6aad1bbaee8b6d44cddd1635ee2e92a897
https://github.com/dyninst/dyninst/commit/8c177b6aad1bbaee8b6d44cddd1635ee2e92a897
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/BPatch_object.C
M symtabAPI/h/Symtab.h
M symtabAPI/src/Symtab.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
Log Message:
-----------
Make .init_array works
Commit: b950ecba784ff7bd85ea960bcacda9119f68cec9
https://github.com/dyninst/dyninst/commit/b950ecba784ff7bd85ea960bcacda9119f68cec9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/h/BPatch_object.h
M dyninstAPI/src/BPatch_object.C
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/unix.C
M symtabAPI/h/Region.h
M symtabAPI/h/Symtab.h
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Region.C
M symtabAPI/src/Symtab.C
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElf.h
Log Message:
-----------
Add .fini_array
Commit: 5a7b78aa57d7d3b0ed4dd15de0e4f22e3ab78e84
https://github.com/dyninst/dyninst/commit/5a7b78aa57d7d3b0ed4dd15de0e4f22e3ab78e84
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M parseAPI/h/CodeSource.h
M symtabAPI/src/emitElf.C
Log Message:
-----------
Remove warnings
Commit: 503b3f487987de87382acc2daad18e7fccbc7a29
https://github.com/dyninst/dyninst/commit/503b3f487987de87382acc2daad18e7fccbc7a29
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/h/BPatch_object.h
M dyninstAPI/src/BPatch_object.C
Log Message:
-----------
Instrument _init and _fini if exists
Commit: 80152d489baf1a8039e6b898a9ae676106dd5f6d
https://github.com/dyninst/dyninst/commit/80152d489baf1a8039e6b898a9ae676106dd5f6d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/binaryEdit.h
M dyninstAPI/src/unix.C
M parseAPI/src/SymtabCodeSource.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Create _dyninstInit and _dyninstFini if exists
Commit: 6a410babc364be1b8344a305809dd116f1bf28bd
https://github.com/dyninst/dyninst/commit/6a410babc364be1b8344a305809dd116f1bf28bd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M dyninstAPI/CMakeLists.txt
A dyninstAPI/src/dynProcess-riscv64.C
M dyninstAPI/src/function.h
M dyninstAPI/src/inst-riscv64.C
M symtabAPI/CMakeLists.txt
Log Message:
-----------
Add dynProcess
Compare: https://github.com/dyninst/dyninst/compare/56ad786f55b0...6a410babc364
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