Branch: refs/heads/angushe/riscv
Home: https://github.com/dyninst/dyninst
Commit: e789b1749109e3db49d622aa480903b29953b43b
https://github.com/dyninst/dyninst/commit/e789b1749109e3db49d622aa480903b29953b43b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M CMakeLists.txt
A cmake/tpls/DyninstCapstone.cmake
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Add CMake stub
Commit: dba6753e442c13701a8477dc5279b0fadbde25b8
https://github.com/dyninst/dyninst/commit/dba6753e442c13701a8477dc5279b0fadbde25b8
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A instructionAPI/capstone/import.py
A instructionAPI/capstone/x86.py
Log Message:
-----------
Make parameter the root directory in import script
Instead of specifying the file name, the user just points to the
directory and the script will grab the necessary files.
Commit: c3b2b0f36822abda225cfa218ba553b6158a5e0e
https://github.com/dyninst/dyninst/commit/c3b2b0f36822abda225cfa218ba553b6158a5e0e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/capstone/import.py
M instructionAPI/capstone/x86.py
Log Message:
-----------
Alias faddp to fadd
Capstone only uses fadd. This does not modify the entryIDs yet.
Commit: 3245cd721a9ee8a7f1835a7390e6cf7b7fe423fa
https://github.com/dyninst/dyninst/commit/3245cd721a9ee8a7f1835a7390e6cf7b7fe423fa
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/capstone/import.py
Log Message:
-----------
Add mnemonic translation to import script
Commit: 92c03bc51b6e565949bf1bc2ff620296c3c54cec
https://github.com/dyninst/dyninst/commit/92c03bc51b6e565949bf1bc2ff620296c3c54cec
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A instructionAPI/src/x86/register-xlat.C
A instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
Add Capstone->Dyninst register translation
Commit: 1f58d832889bcb1e087a644ca93b10ce1866f8a7
https://github.com/dyninst/dyninst/commit/1f58d832889bcb1e087a644ca93b10ce1866f8a7
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A instructionAPI/src/x86/mnemonic-xlat.C
A instructionAPI/src/x86/mnemonic-xlat.h
Log Message:
-----------
Add Capstone->Dyninst mnemonic translation
Commit: fd0820ef64ebfe39d2cc04acf598151d4e6fad64
https://github.com/dyninst/dyninst/commit/fd0820ef64ebfe39d2cc04acf598151d4e6fad64
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
A instructionAPI/src/x86/decoder.C
A instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add stub replacement for x86 decoder
Commit: 04d4bd0fd81911fb6f9bf6ba1ce25b1e62596002
https://github.com/dyninst/dyninst/commit/04d4bd0fd81911fb6f9bf6ba1ce25b1e62596002
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add decoder ctor and dtor
There is one usage of Capstone per decoder. This should be threadsafe
as it doesn't make sense to use a decoder with multiple threads
simultaneously. See comments in ctor for why there are two Capstone
handles per decoder.
Commit: 230e3c0c27e5de29f9abed0388500d67c31db24a
https://github.com/dyninst/dyninst/commit/230e3c0c27e5de29f9abed0388500d67c31db24a
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add decodeOpcode
Commit: 961eea81888b0e439c1b1b51802f38feb7903bbb
https://github.com/dyninst/dyninst/commit/961eea81888b0e439c1b1b51802f38feb7903bbb
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add note in decodeOperands
Commit: fc46b9decaeea09ad61e2faf5c035d5d6d9f4cd0
https://github.com/dyninst/dyninst/commit/fc46b9decaeea09ad61e2faf5c035d5d6d9f4cd0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add doDelayedDecode
This is a copy/paste of Xiaozhu's implementation. It appears to be
incomplete (as per the comments).
Commit: 22e8058f9677a2cf154e3a334fd1af418c295d59
https://github.com/dyninst/dyninst/commit/22e8058f9677a2cf154e3a334fd1af418c295d59
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
stub -- refactor
Commit: 295bcfb9c54fb28c83742952ab4f4aad40673c7a
https://github.com/dyninst/dyninst/commit/295bcfb9c54fb28c83742952ab4f4aad40673c7a
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Use disassembler object in decode_operands
Commit: e9fd102928e144429d4a86df4cfb22394c39f050
https://github.com/dyninst/dyninst/commit/e9fd102928e144429d4a86df4cfb22394c39f050
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Refactor decode_operands
This makes it much easier to follow.
Commit: 283f00f88ed2d0f0ac9760c4d4d82875fb17a6ea
https://github.com/dyninst/dyninst/commit/283f00f88ed2d0f0ac9760c4d4d82875fb17a6ea
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add detailed comments about operand types
Commit: 674d3ff2084cb759d2b68fff9cccaf54b4e36097
https://github.com/dyninst/dyninst/commit/674d3ff2084cb759d2b68fff9cccaf54b4e36097
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use Instruction::makeReturnExpression
No need to reinvent the wheel.
Commit: bcd57d0cef04c93882210b74cff48967edbf6fd5
https://github.com/dyninst/dyninst/commit/bcd57d0cef04c93882210b74cff48967edbf6fd5
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove redundant includes
Commit: 6a341b485d93cd574538cc0dee67220811952051
https://github.com/dyninst/dyninst/commit/6a341b485d93cd574538cc0dee67220811952051
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor handling of implicit registers
By giving the properties names rather than std::pairs, it makes it much
easier to read.
Commit: e087c342fdddfa9b1293668ce9901d8dda424468
https://github.com/dyninst/dyninst/commit/e087c342fdddfa9b1293668ce9901d8dda424468
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Include decoding of {e,r}flags
Commit: 939a7290f00dbd3f4cf325919e5396369e1a0a89
https://github.com/dyninst/dyninst/commit/939a7290f00dbd3f4cf325919e5396369e1a0a89
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment for explicit operands
Commit: 5854b6a0a11e239998efa5f1917ef102100987d5
https://github.com/dyninst/dyninst/commit/5854b6a0a11e239998efa5f1917ef102100987d5
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix explicit operands example
Commit: 68637a1ac2fe13c0e08ef5c5b9080009c9ff1df4
https://github.com/dyninst/dyninst/commit/68637a1ac2fe13c0e08ef5c5b9080009c9ff1df4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove extraneous namespace qualifier
Commit: d3a02906408dd6e9bb8b050a38829fbb52f3a05d
https://github.com/dyninst/dyninst/commit/d3a02906408dd6e9bb8b050a38829fbb52f3a05d
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor is_call
The original code did the nested check, but didn't need to.
if(cat == c_BranchInsn || cat == c_CallInsn) {
isCFT = true;
if(cat == c_CallInsn) {
isCall = true;
}
}
is equivalent to
if(cat == c_CallInsn) {
isCall = true;
}
if(cat == c_BranchInsn || isCall) {
isCFT = true;
}
Commit: 3fda5c12ba38f888d5913c18bc3c166383b5c28c
https://github.com/dyninst/dyninst/commit/3fda5c12ba38f888d5913c18bc3c166383b5c28c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment in expand_eflags
Commit: 69e1abb0937df58f12a66e00f26a64313ec6f66b
https://github.com/dyninst/dyninst/commit/69e1abb0937df58f12a66e00f26a64313ec6f66b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/register-xlat.C
Log Message:
-----------
Fix comment for BND registers
Commit: 42104000ed249685e85ee45d9290a5d1296028f9
https://github.com/dyninst/dyninst/commit/42104000ed249685e85ee45d9290a5d1296028f9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_reg
Commit: 9c5d13f1354e1e5917241de667f1763d2d3bb731
https://github.com/dyninst/dyninst/commit/9c5d13f1354e1e5917241de667f1763d2d3bb731
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_imm
Commit: dc855d47750821c8d488f9324e731643dda79db9
https://github.com/dyninst/dyninst/commit/dc855d47750821c8d488f9324e731643dda79db9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed 64-bit values for immediates
Commit: 8efbe6620f0c98fde9cfb6d4cca0e76f51c50b01
https://github.com/dyninst/dyninst/commit/8efbe6620f0c98fde9cfb6d4cca0e76f51c50b01
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Update comment for relative branch immediates
Commit: 113ee9fc13ba81919fb3e1bfac1dd3568a0b75ef
https://github.com/dyninst/dyninst/commit/113ee9fc13ba81919fb3e1bfac1dd3568a0b75ef
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove error check on size_to_type
It has been updated to include all values used by Capstone.
Commit: b067d92c56330adfaefc681fb915826b3c64e73c
https://github.com/dyninst/dyninst/commit/b067d92c56330adfaefc681fb915826b3c64e73c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove unneeded assert
Commit: 7d3c09e0e7297b92ea685e7b6c302f2e19dc0a83
https://github.com/dyninst/dyninst/commit/7d3c09e0e7297b92ea685e7b6c302f2e19dc0a83
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move is_call and is_cft to where they are used
Commit: 0530f257dd4cb3ff3233a7ff3b3baa65e53a4aa1
https://github.com/dyninst/dyninst/commit/0530f257dd4cb3ff3233a7ff3b3baa65e53a4aa1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed values for calculations
The manual says everything but the scale can be positive or negative.
Commit: 2155e2e8812911b2c34a8fe766082c7305de8ce9
https://github.com/dyninst/dyninst/commit/2155e2e8812911b2c34a8fe766082c7305de8ce9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use braces
Commit: e4a78fc6cd6945e8e7532e83287ac28912356a9c
https://github.com/dyninst/dyninst/commit/e4a78fc6cd6945e8e7532e83287ac28912356a9c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move size_to_type to where it is used
Commit: 5dd07cba5b3528eb65f7a80cc95d330025949d05
https://github.com/dyninst/dyninst/commit/5dd07cba5b3528eb65f7a80cc95d330025949d05
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add some whitespace
Commit: ed806083cc2a61f6fb9450bbcf44f3767d0f56fe
https://github.com/dyninst/dyninst/commit/ed806083cc2a61f6fb9450bbcf44f3767d0f56fe
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add description from Intel manual
Commit: b529be570345c3e79ff95ed2b3bf3e5121de1ef8
https://github.com/dyninst/dyninst/commit/b529be570345c3e79ff95ed2b3bf3e5121de1ef8
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Return early if processing a CFT
Commit: b6b0740b519065b421830d262a4e5212377f62ca
https://github.com/dyninst/dyninst/commit/b6b0740b519065b421830d262a4e5212377f62ca
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add comment about LEA
Commit: 4b153845502d116a5801dcc63bc1ae6651ea2f3a
https://github.com/dyninst/dyninst/commit/4b153845502d116a5801dcc63bc1ae6651ea2f3a
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Rename immAST -> displacementAST
This better reflects its meaning.
Commit: 162d336e97126bd3f16a660b1240b2d9a76ac2a3
https://github.com/dyninst/dyninst/commit/162d336e97126bd3f16a660b1240b2d9a76ac2a3
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Handle segment registers as memory operands
Commit: 743c37cf7f534ee074b796ff973dda03be3301f4
https://github.com/dyninst/dyninst/commit/743c37cf7f534ee074b796ff973dda03be3301f4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Fix cmake formatting in instructionAPI/CMakeLists.txt
Commit: 12e32670b97f4ed1a19d2791925c1b3ac2d97ea9
https://github.com/dyninst/dyninst/commit/12e32670b97f4ed1a19d2791925c1b3ac2d97ea9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
M docker/dependencies.versions
Log Message:
-----------
Add dependency-version check for Capstone
Commit: e0b3455871bdde3cbf0584c855c953b44c3e543c
https://github.com/dyninst/dyninst/commit/e0b3455871bdde3cbf0584c855c953b44c3e543c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Make Capstone a private dependency
Commit: 905b65c5248a26d580496da0a0feefd8672c05a4
https://github.com/dyninst/dyninst/commit/905b65c5248a26d580496da0a0feefd8672c05a4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A docker/build_capstone.sh
M docker/dependencies.versions
Log Message:
-----------
Docker: add Capstone builds
Commit: 80d51ddcec4d1205c624dc5b0349c5b0031bd183
https://github.com/dyninst/dyninst/commit/80d51ddcec4d1205c624dc5b0349c5b0031bd183
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Only decode segment register operands for i386
Commit: 34162d072575ccf96845be954450118dfebe6f5f
https://github.com/dyninst/dyninst/commit/34162d072575ccf96845be954450118dfebe6f5f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix format from clang's -Wformat-pedantic
Commit: 9deb07d73208cd2b9222130c3c4c7b458d48a772
https://github.com/dyninst/dyninst/commit/9deb07d73208cd2b9222130c3c4c7b458d48a772
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M cmake/tpls/DyninstCapstone.cmake
Log Message:
-----------
Use correct capitalization for capstone_ROOT in CMake
Commit: 965e014b701dd8c9acdcf2faa28490120e473b9f
https://github.com/dyninst/dyninst/commit/965e014b701dd8c9acdcf2faa28490120e473b9f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/h/Architecture.h
M dwarf/src/dwarfHandle.C
Log Message:
-----------
Add riscv architecture
Commit: 79ecc7f5cc49531fceda9b0146bcefc0eb51ba63
https://github.com/dyninst/dyninst/commit/79ecc7f5cc49531fceda9b0146bcefc0eb51ba63
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A instructionAPI/capstone/capstone.py
M instructionAPI/capstone/import.py
A instructionAPI/capstone/riscv64.py
Log Message:
-----------
Add riscv64 capstone parser
Commit: d6835ff3c403051ddb783264f1ef99162db7301b
https://github.com/dyninst/dyninst/commit/d6835ff3c403051ddb783264f1ef99162db7301b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/CMakeLists.txt
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/h/mnemonics/riscv64_entryIDs.h
A common/h/registers/riscv64_regs.h
A common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add RISC-V registers and mnemonics
Commit: 7cf30adf392c4ca4ea49be963ad377dad9ba6ac7
https://github.com/dyninst/dyninst/commit/7cf30adf392c4ca4ea49be963ad377dad9ba6ac7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M elf/src/Elf_X.C
M proccontrol/src/process.C
Log Message:
-----------
Add cases for Arch_riscv64 to suppress compiler warnings
Commit: b701b3f86e68b8a6c7102884c275fba8248c23f9
https://github.com/dyninst/dyninst/commit/b701b3f86e68b8a6c7102884c275fba8248c23f9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
M instructionAPI/capstone/import.py
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
A instructionAPI/src/InstructionDecoder-Capstone.C
A instructionAPI/src/InstructionDecoder-Capstone.h
A instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/InstructionDecoderImpl.C
Log Message:
-----------
Add Capstone-based RISC-V InstructionAPI
Commit: b0981929c275cde22857eaaf08ff9a2128e76d83
https://github.com/dyninst/dyninst/commit/b0981929c275cde22857eaaf08ff9a2128e76d83
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M parseAPI/CMakeLists.txt
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
A parseAPI/src/IA_riscv64.C
A parseAPI/src/IA_riscv64.h
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Add RISC-V ParseAPI
Commit: 27fa93b987fb3d580c5f13233f3414b465e4c5fa
https://github.com/dyninst/dyninst/commit/27fa93b987fb3d580c5f13233f3414b465e4c5fa
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dataflowAPI/rose/SgAsmRiscv64Instruction.h
M dataflowAPI/rose/conversions.h
A dataflowAPI/rose/semantics/DispatcherRiscv64.C
A dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/RoseInsnFactory.h
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
A external/rose/riscv64InstructionEnum.h
M external/rose/rose-compat.h
Log Message:
-----------
Implement RISC-V DataflowAPI base code
Commit: bc770aa7f0e58a24f35a704aeccf606cfdefabd9
https://github.com/dyninst/dyninst/commit/bc770aa7f0e58a24f35a704aeccf606cfdefabd9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dataflowAPI/sail/riscv_sail_to_rose.pl
A dataflowAPI/sail/sail_ast.pl
A dataflowAPI/sail/sail_lex.pl
A dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add sail lexical parser
Commit: 06472424a2f739a1ac65116f1403d441b3040a80
https://github.com/dyninst/dyninst/commit/06472424a2f739a1ac65116f1403d441b3040a80
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
rewrite sail lexer using regex
Commit: 97819869fa80def7ebe590afb633417ebc0bece9
https://github.com/dyninst/dyninst/commit/97819869fa80def7ebe590afb633417ebc0bece9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
Use array instead of hash
Commit: 6ef4c646a05e512db902c06af263ae2076b66d29
https://github.com/dyninst/dyninst/commit/6ef4c646a05e512db902c06af263ae2076b66d29
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add most syntax
Commit: c7c9a1be3d974a7a7e2ad73d9828fa5a03205f80
https://github.com/dyninst/dyninst/commit/c7c9a1be3d974a7a7e2ad73d9828fa5a03205f80
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dataflowAPI/sail/riscv_ast.json
R dataflowAPI/sail/riscv_sail_to_rose.pl
R dataflowAPI/sail/sail_ast.pl
R dataflowAPI/sail/sail_lex.pl
R dataflowAPI/sail/sail_syntax.pl
A dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (UTYPE)
Commit: a627bca207ebb194f2750a77a9d458e4c5be3954
https://github.com/dyninst/dyninst/commit/a627bca207ebb194f2750a77a9d458e4c5be3954
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/h/Architecture.h
Log Message:
-----------
Add missing riscv64 address width
Commit: ebfcf1e6c354543e59c6487b17c13d35ae603039
https://github.com/dyninst/dyninst/commit/ebfcf1e6c354543e59c6487b17c13d35ae603039
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (IMAC subsets)
Commit: f81cc6fec95c0320ef0a7190f2ac9dbf1b673516
https://github.com/dyninst/dyninst/commit/f81cc6fec95c0320ef0a7190f2ac9dbf1b673516
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Integrate riscv64 ROSE code into dataflowAPI
Commit: 42cb1d2b122e26ec2e622a0d32326a2bfb0fa439
https://github.com/dyninst/dyninst/commit/42cb1d2b122e26ec2e622a0d32326a2bfb0fa439
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
R instructionAPI/src/x86/decoder.C
R instructionAPI/src/x86/decoder.h
R instructionAPI/src/x86/mnemonic-xlat.C
R instructionAPI/src/x86/mnemonic-xlat.h
R instructionAPI/src/x86/register-xlat.C
R instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
migrate instructionAPI to capstone
Commit: 08ca9c9c5b9ee2f12f088c5d7bbe5c7c53804715
https://github.com/dyninst/dyninst/commit/08ca9c9c5b9ee2f12f088c5d7bbe5c7c53804715
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/BaseSemantics2.h
A dataflowAPI/rose/semantics/ConcreteSemantics2.C
A dataflowAPI/rose/semantics/ConcreteSemantics2.h
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/SymEvalPolicy.h
Log Message:
-----------
fix mulhsu instruction semantic
Commit: d81186b0f6755c298b416a17c4af64e3a238f5e0
https://github.com/dyninst/dyninst/commit/d81186b0f6755c298b416a17c4af64e3a238f5e0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M cmake/DyninstPlatform.cmake
M cmake/tpls/DyninstCapstone.cmake
M common/CMakeLists.txt
A common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/src/ABI.C
M dataflowAPI/src/RegisterMap.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
A dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
A dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
A dyninstAPI/src/codegen-riscv64.C
A dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.h
A dyninstAPI/src/emit-riscv64.C
A dyninstAPI/src/emit-riscv64.h
A dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/mapped_object.C
A dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
M dyninstAPI_RT/CMakeLists.txt
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/CMakeLists.txt
M proccontrol/src/linux.C
M proccontrol/src/linux.h
A proccontrol/src/loadLibrary/codegen-riscv64.C
M proccontrol/src/loadLibrary/codegen.C
M proccontrol/src/loadLibrary/codegen.h
A proccontrol/src/riscv_process.C
A proccontrol/src/riscv_process.h
Log Message:
-----------
Add RISC-V guards
Commit: bb2cf10a9d5004b8f61c0a2dcf7d00973fa485a1
https://github.com/dyninst/dyninst/commit/bb2cf10a9d5004b8f61c0a2dcf7d00973fa485a1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/function.h
M dyninstAPI/src/linux.C
M stackwalk/CMakeLists.txt
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/framestepper.C
A stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/linux-swk.C
A stackwalk/src/riscv64-swk.C
A stackwalk/src/riscv64-swk.h
M symtabAPI/CMakeLists.txt
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add RISC-V stackwalk guard
Commit: f7a093ad26469689652aa52020abe159cfecfe85
https://github.com/dyninst/dyninst/commit/f7a093ad26469689652aa52020abe159cfecfe85
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dyninstAPI_RT/src/RTthread-riscv64.c
Log Message:
-----------
Add missing RTthread-riscv64.c
Commit: 305439c95970a620a1f24d6545b47caa478355f9
https://github.com/dyninst/dyninst/commit/305439c95970a620a1f24d6545b47caa478355f9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A symtabAPI/src/emitElfStatic-riscv64.C
A symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Create RISC-V emitter template
Commit: 56e4d4054493e56cbeb6d3157565cec996481f5e
https://github.com/dyninst/dyninst/commit/56e4d4054493e56cbeb6d3157565cec996481f5e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dyninstAPI_RT/src/RTstatic_ctors_dtors-riscv64.c
Log Message:
-----------
Add missing RTstatic_ctors_dtors-riscv64.c
Commit: e1bb0976ef808494a75843d0a6516d60c98da317
https://github.com/dyninst/dyninst/commit/e1bb0976ef808494a75843d0a6516d60c98da317
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dataflowAPI/src/RegisterMap.h
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/RegisterConversion-riscv64.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
A dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/linux-riscv64.C
A dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-riscv64.C
M dyninstAPI/src/unix.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/src/emitElfStatic-stub.C
Log Message:
-----------
Make RISC-V dyninst compile on a RISC-V machine
Commit: aee61b1d22858acef129d064f8979339b4a38e85
https://github.com/dyninst/dyninst/commit/aee61b1d22858acef129d064f8979339b4a38e85
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
Log Message:
-----------
Implement some instruction emission functions
Commit: 08d1ed34b03585b9395339b9b75f616af9c1ac64
https://github.com/dyninst/dyninst/commit/08d1ed34b03585b9395339b9b75f616af9c1ac64
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/registerSpace.h
M external/rose/riscv64InstructionEnum.h
Log Message:
-----------
Amalgamate 32 and 64 bit fpr
Commit: 3646f60af93c853b54dde716a1530d4f7456f261
https://github.com/dyninst/dyninst/commit/3646f60af93c853b54dde716a1530d4f7456f261
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Add emitImm
Commit: 6e1895fe4e862de85e8de1aa746a903d4c1b8710
https://github.com/dyninst/dyninst/commit/6e1895fe4e862de85e8de1aa746a903d4c1b8710
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/ABI.C
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/src/linux.C
M stackwalk/src/dbginfo-stepper.C
Log Message:
-----------
Rename arch_riscv64 to DYNINST_HOST_ARCH_AARCH64
Commit: 8494eb6e1a6a37a3757bbf3016172eaddfc21bc9
https://github.com/dyninst/dyninst/commit/8494eb6e1a6a37a3757bbf3016172eaddfc21bc9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/CMakeLists.txt
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/convert.C
A dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/convertOpcodes.C
M dwarf/CMakeLists.txt
M dwarf/src/registers/convert.C
A dwarf/src/registers/riscv64.h
M dyninstAPI/src/inst-riscv64.h
M external/rose/riscv64InstructionEnum.h
M parseAPI/CMakeLists.txt
Log Message:
-----------
Add missing RISC-V ROSE register conversion
Commit: bbc5a7c26734edb237328854c66dd04b19d770b8
https://github.com/dyninst/dyninst/commit/bbc5a7c26734edb237328854c66dd04b19d770b8
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Add missing invalid operand check
Commit: b73864f1472d3327bcc8b9dc4d99ceb46f6a9fcd
https://github.com/dyninst/dyninst/commit/b73864f1472d3327bcc8b9dc4d99ceb46f6a9fcd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/RoseInsnFactory.h
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/mapped_object.C
M instructionAPI/h/Instruction.h
M instructionAPI/src/InstructionDecoder-Capstone.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/interrupts.C
M instructionAPI/src/syscalls.C
M parseAPI/CMakeLists.txt
M parseAPI/src/IA_riscv64.C
M stackwalk/CMakeLists.txt
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/CMakeLists.txt
Log Message:
-----------
Modify RISC-V Capstone instruction decoder
Commit: d81cec38957c71bbcc23613fc398bd7de8b7ba89
https://github.com/dyninst/dyninst/commit/d81cec38957c71bbcc23613fc398bd7de8b7ba89
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add C-Type Emitter
Commit: fe79f79f16be74727387196cf1007d5654ce540b
https://github.com/dyninst/dyninst/commit/fe79f79f16be74727387196cf1007d5654ce540b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add Load Immediate
Commit: 84e58d228734b32765bc8cead61be626b219b3ac
https://github.com/dyninst/dyninst/commit/84e58d228734b32765bc8cead61be626b219b3ac
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Change insn_size to is_compressed
Commit: b51bff8b90f8a95e1d32b1fb090d545e62f999dd
https://github.com/dyninst/dyninst/commit/b51bff8b90f8a95e1d32b1fb090d545e62f999dd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add addi codegen
Commit: da8d466c281607e2ee4abd1f8be34375ec9199e2
https://github.com/dyninst/dyninst/commit/da8d466c281607e2ee4abd1f8be34375ec9199e2
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Optimize addi Code Generation
Commit: 20209362a937b17e802937af3c3133a7dabdb1e8
https://github.com/dyninst/dyninst/commit/20209362a937b17e802937af3c3133a7dabdb1e8
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI/CMakeLists.txt
M dyninstAPI_RT/CMakeLists.txt
Log Message:
-----------
Fix DYNINST_ARCH_riscv64
Commit: 3c8eebcf364ad4c93d68c0eb9c17ce748178092f
https://github.com/dyninst/dyninst/commit/3c8eebcf364ad4c93d68c0eb9c17ce748178092f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/ABI.C
Log Message:
-----------
Add RISC-V initialize64
Commit: 9f9b0d0adc1fa30c60aeeaa30979b949762155e5
https://github.com/dyninst/dyninst/commit/9f9b0d0adc1fa30c60aeeaa30979b949762155e5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Parsing-arch.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-aarch64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/parse-cfg.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/CMakeLists.txt
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Rebase and fix code generation
Commit: 6bc72d87977a42a52bf33a7e6769935ed7de85ea
https://github.com/dyninst/dyninst/commit/6bc72d87977a42a52bf33a7e6769935ed7de85ea
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V jump instruction generation
Commit: 0e1b48f24fe40ba2b681ae82cccf1973f9ce38d0
https://github.com/dyninst/dyninst/commit/0e1b48f24fe40ba2b681ae82cccf1973f9ce38d0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/linux-riscv64-swk.C
Log Message:
-----------
Change gregs to __gregs
Commit: 57d33485f3262b85deb16e0fd9b68d401f00be06
https://github.com/dyninst/dyninst/commit/57d33485f3262b85deb16e0fd9b68d401f00be06
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V Long Branch
Commit: f1e9ae99a553e203e53925fbdc109482770af69a
https://github.com/dyninst/dyninst/commit/f1e9ae99a553e203e53925fbdc109482770af69a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite shifts and constants in RISC-V codegen
Commit: d3a1b2432fb601041b925cdc322ffbec83380f58
https://github.com/dyninst/dyninst/commit/d3a1b2432fb601041b925cdc322ffbec83380f58
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix wrong indexing order in INSN_SET
Commit: 81ea2088a3bbf39d3130960d489a815f55fb9e0f
https://github.com/dyninst/dyninst/commit/81ea2088a3bbf39d3130960d489a815f55fb9e0f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite load and store using I-Type and S-Type generator
Commit: 79beb3792c747ae1e1ab2cf6f6227357ddf2aaf3
https://github.com/dyninst/dyninst/commit/79beb3792c747ae1e1ab2cf6f6227357ddf2aaf3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Finish emit basic operators
Commit: 52e7b2ec81911b050d5eda80e463d4d2f82eb333
https://github.com/dyninst/dyninst/commit/52e7b2ec81911b050d5eda80e463d4d2f82eb333
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Add conditional branch
Commit: 76145137996a28711d2696b0fa17d18464f7a548
https://github.com/dyninst/dyninst/commit/76145137996a28711d2696b0fa17d18464f7a548
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish emit-riscv64.C
Commit: 2b28a54086e567c0489170f0eca58648a6daf7a7
https://github.com/dyninst/dyninst/commit/2b28a54086e567c0489170f0eca58648a6daf7a7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
M dataflowAPI/rose/registers/convert.C
M dataflowAPI/rose/registers/riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish inst-riscv64.C
Commit: 7f79f54477535f9573033bb45997c51b0c12254d
https://github.com/dyninst/dyninst/commit/7f79f54477535f9573033bb45997c51b0c12254d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
Log Message:
-----------
Rewrite RISC-V Branch
Commit: dcb48802b3033aac1bcd3cc34c1ec86712954cca
https://github.com/dyninst/dyninst/commit/dcb48802b3033aac1bcd3cc34c1ec86712954cca
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Make dyninstAPI compile
Commit: 2a013957ac380c580d61bd4d13e0b9f3e9b91e00
https://github.com/dyninst/dyninst/commit/2a013957ac380c580d61bd4d13e0b9f3e9b91e00
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Update MachRegister
Commit: a7cbd4554ea79592959ee3a33e843de0e4372496
https://github.com/dyninst/dyninst/commit/a7cbd4554ea79592959ee3a33e843de0e4372496
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M parseAPI/h/CFGModifier.h
M parseAPI/src/BoundFactCalculator.C
Log Message:
-----------
Fixed missing RISC-V BoundFact
Commit: 1584562fc5006f91f39a5747994854a2cb70ee9c
https://github.com/dyninst/dyninst/commit/1584562fc5006f91f39a5747994854a2cb70ee9c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Incorrect plt entry
Commit: 5c1b5470454822ce848bc727a29fe4df51c6e982
https://github.com/dyninst/dyninst/commit/5c1b5470454822ce848bc727a29fe4df51c6e982
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A instructionAPI/src/.gdb_history
M instructionAPI/src/InstructionCategories.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix RISC-V bugs in Instruction API
Commit: 6fdfda8388b8014e221310d23ac01bfa25a42ade
https://github.com/dyninst/dyninst/commit/6fdfda8388b8014e221310d23ac01bfa25a42ade
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
M instructionAPI/h/Operation_impl.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix some bugs
Commit: b2c59c690dc068ec1cfa45cfa66f8669c3b3f7dc
https://github.com/dyninst/dyninst/commit/b2c59c690dc068ec1cfa45cfa66f8669c3b3f7dc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix Segfault in pointer casting
Commit: 4f4f88eb04cd2e9a98f187520fa2e0f4bad2cf32
https://github.com/dyninst/dyninst/commit/4f4f88eb04cd2e9a98f187520fa2e0f4bad2cf32
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/registers/riscv64.h
Log Message:
-----------
Fix ROSE register conversion I forgot to change after rebase
Commit: b1f606351a2ed660aedf61a2de762b1de4fab2cd
https://github.com/dyninst/dyninst/commit/b1f606351a2ed660aedf61a2de762b1de4fab2cd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add register massaging to jalr
Commit: a3325fabde309a598f18fe82bfdd6428688c40a4
https://github.com/dyninst/dyninst/commit/a3325fabde309a598f18fe82bfdd6428688c40a4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/registerSpace.h
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix jr instruction and incorrect fp
Commit: 08cf7131d015fe50afc483a664fe2c5ee3807955
https://github.com/dyninst/dyninst/commit/08cf7131d015fe50afc483a664fe2c5ee3807955
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Revert wrong readRegister fix
Commit: ceb8284ee5520c25538d89536121cea16fd72c41
https://github.com/dyninst/dyninst/commit/ceb8284ee5520c25538d89536121cea16fd72c41
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/Instruction.C
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Fix isReturn bug
Commit: 7491be775dd422960d051c6fbdb959766a3b9fe6
https://github.com/dyninst/dyninst/commit/7491be775dd422960d051c6fbdb959766a3b9fe6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
Log Message:
-----------
Fixed ud2 in RegisterMap
Commit: 45b42d16c7ab564ab55b32f77dfec7390ced16cf
https://github.com/dyninst/dyninst/commit/45b42d16c7ab564ab55b32f77dfec7390ced16cf
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Add riscv attribute
Commit: cafbe699534fb2fc27a686844390275f5646394c
https://github.com/dyninst/dyninst/commit/cafbe699534fb2fc27a686844390275f5646394c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Make Dyninst recognize .riscv.attributes
Commit: f2fc86ed3fbc99aa4d5a7a01e7f75042d1640ccb
https://github.com/dyninst/dyninst/commit/f2fc86ed3fbc99aa4d5a7a01e7f75042d1640ccb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix bug parsing .riscv.attributes
Commit: bf193f1acda8c2c9667d0232261654ff383d639c
https://github.com/dyninst/dyninst/commit/bf193f1acda8c2c9667d0232261654ff383d639c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Fix incorrect relocation category
Commit: 0a5ae5fd14c1ce13baf30390020ac8a727bcdf3d
https://github.com/dyninst/dyninst/commit/0a5ae5fd14c1ce13baf30390020ac8a727bcdf3d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Don't know why I missed getRelTypeByElfMachine
Commit: c4dcde432fe73915430e5f5e4846b48300cba762
https://github.com/dyninst/dyninst/commit/c4dcde432fe73915430e5f5e4846b48300cba762
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
ifdef for libelf compatilibity
Commit: 5cc07ac303ff365c1dd5df29af543b1384d79415
https://github.com/dyninst/dyninst/commit/5cc07ac303ff365c1dd5df29af543b1384d79415
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add library adjust
Commit: e2891bee02d6aec4412bbf2c506ab83bf27eb82f
https://github.com/dyninst/dyninst/commit/e2891bee02d6aec4412bbf2c506ab83bf27eb82f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add preinit array
Commit: 9f7e331c8f6bde4a0ff4128d6789829648b9f276
https://github.com/dyninst/dyninst/commit/9f7e331c8f6bde4a0ff4128d6789829648b9f276
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Fix incorrect uleb128 parsing
Commit: cd45ec814778c54bf120987a608d2495b8dc2f1d
https://github.com/dyninst/dyninst/commit/cd45ec814778c54bf120987a608d2495b8dc2f1d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix tag variable shadowing
Commit: cd80b8f23dbe4d08436f751e4925b2555d6064d1
https://github.com/dyninst/dyninst/commit/cd80b8f23dbe4d08436f751e4925b2555d6064d1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Null instrumentation now works
Commit: b7fd9f895f948b350d38e2751c14a2bf34a7bd9d
https://github.com/dyninst/dyninst/commit/b7fd9f895f948b350d38e2751c14a2bf34a7bd9d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix incorrect parentheses and generateLoadImm
Commit: c1dbfa9271e39c899605db3108ae3d63a2374050
https://github.com/dyninst/dyninst/commit/c1dbfa9271e39c899605db3108ae3d63a2374050
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
is_compressed should be true for C instructions
Commit: b2671294cf13cc18e1d29e8f9bb42f6f4f84d32e
https://github.com/dyninst/dyninst/commit/b2671294cf13cc18e1d29e8f9bb42f6f4f84d32e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Fix inconsistency between Capstone and ROSE
Commit: c23258497619ce7df58274417ffc8406ae57ce3c
https://github.com/dyninst/dyninst/commit/c23258497619ce7df58274417ffc8406ae57ce3c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Hardwire x0 to 0
Commit: 676e5a9bbf00f42c062dccb10263d2e9d50a7529
https://github.com/dyninst/dyninst/commit/676e5a9bbf00f42c062dccb10263d2e9d50a7529
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-aarch64.C
Log Message:
-----------
Readd disappeared codegen in aarch64
Commit: 9c6412ddea067fafcdd1d6996c50327ad7fef90c
https://github.com/dyninst/dyninst/commit/9c6412ddea067fafcdd1d6996c50327ad7fef90c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
emitLoadRelative and emitStoreRelative should be implemented
Commit: 16e989bfc026cb97f01aca6dd28053857ed1101e
https://github.com/dyninst/dyninst/commit/16e989bfc026cb97f01aca6dd28053857ed1101e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
remove evil constants
Commit: 8b6fbd9b08cdfa372fe04f65bfbb3e91686f2d8e
https://github.com/dyninst/dyninst/commit/8b6fbd9b08cdfa372fe04f65bfbb3e91686f2d8e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
Log Message:
-----------
RISC-V CFWidget
Commit: 5bf1c6e3b47f5f252d19003370d9ea016062d4b9
https://github.com/dyninst/dyninst/commit/5bf1c6e3b47f5f252d19003370d9ea016062d4b9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
Log Message:
-----------
RISC-V PCWidget
Commit: 3416f4860a191583f2acca5f9c35b43fef6384db
https://github.com/dyninst/dyninst/commit/3416f4860a191583f2acca5f9c35b43fef6384db
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
Log Message:
-----------
Add flag to compressed instructions generation
Commit: 9598cf5b956b26f0fc9fc3a362e8c3416515d958
https://github.com/dyninst/dyninst/commit/9598cf5b956b26f0fc9fc3a362e8c3416515d958
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/emit-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/req.txt
Log Message:
-----------
Huge update
Commit: 9f7827030ae29520e3d93eaaa4159247c3df49e7
https://github.com/dyninst/dyninst/commit/9f7827030ae29520e3d93eaaa4159247c3df49e7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-aarch64.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Split codegen into multiple of 16 bits
Commit: 1f3a91af2f43be587c186848137b15eed6e7a80c
https://github.com/dyninst/dyninst/commit/1f3a91af2f43be587c186848137b15eed6e7a80c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix indexing issue
Commit: 7fe3a6ae03ac99388ceaffeee2758f2ebebc51fb
https://github.com/dyninst/dyninst/commit/7fe3a6ae03ac99388ceaffeee2758f2ebebc51fb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix RISC-V ret bugs
Commit: 9cb5bde80ce710af64adf86897068d8eecb30174
https://github.com/dyninst/dyninst/commit/9cb5bde80ce710af64adf86897068d8eecb30174
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Fix stack and instruction bugs
Commit: 510b4c7b833a20469be892318d7c17ec1d529564
https://github.com/dyninst/dyninst/commit/510b4c7b833a20469be892318d7c17ec1d529564
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix long branch bug
Commit: c38455cadb2de5d45ce05c5d0c60a56f9c80abeb
https://github.com/dyninst/dyninst/commit/c38455cadb2de5d45ce05c5d0c60a56f9c80abeb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add modifyData and fix auipc jalr bug
Commit: 8c200fbd689809190ce0f1807ecc012c2e709d14
https://github.com/dyninst/dyninst/commit/8c200fbd689809190ce0f1807ecc012c2e709d14
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M proccontrol/src/riscv_process.C
Log Message:
-----------
Add Marco's patch
Commit: 2cd17f44bb08f3ce2b498afc9be3b6bd6022a6d9
https://github.com/dyninst/dyninst/commit/2cd17f44bb08f3ce2b498afc9be3b6bd6022a6d9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Change PC to read PC register
Commit: a342f7dfb4bd54e9805c6ba85bd64a4fa0515d3d
https://github.com/dyninst/dyninst/commit/a342f7dfb4bd54e9805c6ba85bd64a4fa0515d3d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Patch RISC-V SAIL parser
Commit: d39a41f1eab6c0c56ed61120c3809b95bf3137f6
https://github.com/dyninst/dyninst/commit/d39a41f1eab6c0c56ed61120c3809b95bf3137f6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Fix parse_riscv_attribute API
Commit: 8595b068d736ccfc56dac86237e103d092027c42
https://github.com/dyninst/dyninst/commit/8595b068d736ccfc56dac86237e103d092027c42
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
M parseAPI/src/IA_riscv64.C
M proccontrol/src/riscv_process.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Fix include arch-riscv64.h
Commit: bd77b7d86673de5d1d96a501a151f936ff744bc8
https://github.com/dyninst/dyninst/commit/bd77b7d86673de5d1d96a501a151f936ff744bc8
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Revert emitElfStatic-riscv64.C
Commit: 92ec07884495e5a59f1923f02da07d993c491ad7
https://github.com/dyninst/dyninst/commit/92ec07884495e5a59f1923f02da07d993c491ad7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M proccontrol/src/riscv_process.C
Log Message:
-----------
Fix Object ELF
Commit: c6eb97517c53a22d7218e8fba2392a06884e1df5
https://github.com/dyninst/dyninst/commit/c6eb97517c53a22d7218e8fba2392a06884e1df5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M parseAPI/h/CodeSource.h
M parseAPI/h/InstructionAdapter.h
M parseAPI/src/IA_IAPI.C
M parseAPI/src/IA_IAPI.h
M parseAPI/src/IA_riscv64.C
M parseAPI/src/Parser.C
M parseAPI/src/Parser.h
M parseAPI/src/ParserDetails.C
M parseAPI/src/SymtabCodeSource.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Solve RISC-V PLT issue
Commit: 4a28058dd7676a0e878f2166c41e10939055ed9d
https://github.com/dyninst/dyninst/commit/4a28058dd7676a0e878f2166c41e10939055ed9d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
64 ->XLENBITS
Commit: 45622ef6a440c039ae3df0f4465d87cb0b9c01ea
https://github.com/dyninst/dyninst/commit/45622ef6a440c039ae3df0f4465d87cb0b9c01ea
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite constant constraints
Commit: 6345b4941bf127a1493df2d475e7d163d7741a9e
https://github.com/dyninst/dyninst/commit/6345b4941bf127a1493df2d475e7d163d7741a9e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Implement missing memory codegen and fix wrong emitImm
Commit: 98210624883f65927c8a35cb11b24fae83958521
https://github.com/dyninst/dyninst/commit/98210624883f65927c8a35cb11b24fae83958521
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add missing instructions in instructionAPI
Commit: bf26bab172e6bf8368c81ab80313eefa04cec487
https://github.com/dyninst/dyninst/commit/bf26bab172e6bf8368c81ab80313eefa04cec487
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix c.lui
Commit: 00063b8c3e0bf43debdb2e2d11ac7e45493a5be1
https://github.com/dyninst/dyninst/commit/00063b8c3e0bf43debdb2e2d11ac7e45493a5be1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Correct storing registers in emitCall
Commit: 54b2c49ebe13848b8affabb4c4e5536b8fed28ac
https://github.com/dyninst/dyninst/commit/54b2c49ebe13848b8affabb4c4e5536b8fed28ac
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add missing atomic instruction in InstructionAPI
Commit: da64c9dd48ba7a9a9546455c8da24fb5442b5026
https://github.com/dyninst/dyninst/commit/da64c9dd48ba7a9a9546455c8da24fb5442b5026
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix inter modular function address
Commit: 4ec06246895adb44cf7d9487474348ee07c7b09c
https://github.com/dyninst/dyninst/commit/4ec06246895adb44cf7d9487474348ee07c7b09c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Add branch via trap for RISC-V
Commit: f87bbb572f0ff01aeced52161e877eb153cadaf9
https://github.com/dyninst/dyninst/commit/f87bbb572f0ff01aeced52161e877eb153cadaf9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Pull register space from address space
Commit: 9bbc5a4f2bac51b84f2ba64f440394699ced24ce
https://github.com/dyninst/dyninst/commit/9bbc5a4f2bac51b84f2ba64f440394699ced24ce
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
Log Message:
-----------
Fix wrong ElfX_Dyn
Commit: 9686a2323955c80224e50b3d8983d0fdb456a46d
https://github.com/dyninst/dyninst/commit/9686a2323955c80224e50b3d8983d0fdb456a46d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix call instruction codegen bugs
Commit: bea56b2e15cdd8aecb4c8bae167cea1a07fe42dd
https://github.com/dyninst/dyninst/commit/bea56b2e15cdd8aecb4c8bae167cea1a07fe42dd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix lui signedness problem
Commit: 081655628849a50c4ce16936cdeec3d0b817399c
https://github.com/dyninst/dyninst/commit/081655628849a50c4ce16936cdeec3d0b817399c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Minor adjustment in RISCV emitElfStatic
Commit: 389345025b49c9faea112301e101de67d5d9ba06
https://github.com/dyninst/dyninst/commit/389345025b49c9faea112301e101de67d5d9ba06
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Add missing addressWidth
Commit: 47be250c6e67dc3449e01f59f473e84752161524
https://github.com/dyninst/dyninst/commit/47be250c6e67dc3449e01f59f473e84752161524
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen.C
Log Message:
-----------
Variable length buffer
Commit: 3800a22d002c885255ad0dbd6607dcd1dc7a595f
https://github.com/dyninst/dyninst/commit/3800a22d002c885255ad0dbd6607dcd1dc7a595f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix incorrect offset in emitCall and emitLoadShared
Commit: caed862d7af7bde450aef9591ae0db8117adcbeb
https://github.com/dyninst/dyninst/commit/caed862d7af7bde450aef9591ae0db8117adcbeb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
beq to bne
Commit: 94de99877fec7c03a9178f00aeec331f4c751a03
https://github.com/dyninst/dyninst/commit/94de99877fec7c03a9178f00aeec331f4c751a03
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M instructionAPI/src/InstructionDecoder-Capstone.C
Log Message:
-----------
Fix indentation
Commit: 71987e184806a906ced5d4cab53f5736aa84c063
https://github.com/dyninst/dyninst/commit/71987e184806a906ced5d4cab53f5736aa84c063
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Improve immediate calculation algorithm
Commit: a8577576a301111fd406ca3be660cda17286f9ef
https://github.com/dyninst/dyninst/commit/a8577576a301111fd406ca3be660cda17286f9ef
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Remove optimization for relative load store
Commit: fe17578462a5dc22ccf6c0fc913b29413d26708c
https://github.com/dyninst/dyninst/commit/fe17578462a5dc22ccf6c0fc913b29413d26708c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix conditional branch offset error
Commit: 7ae83ebc7f68e3274c1f3eb23d9cbedbeff1d3cc
https://github.com/dyninst/dyninst/commit/7ae83ebc7f68e3274c1f3eb23d9cbedbeff1d3cc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix jump offset
Commit: c410df540a5fe42f5a6fe7ca61227a445144505c
https://github.com/dyninst/dyninst/commit/c410df540a5fe42f5a6fe7ca61227a445144505c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Fix jump target in emitIf
Commit: 8fdfe3af2ae377c95f6e349b42f7eadedd975e35
https://github.com/dyninst/dyninst/commit/8fdfe3af2ae377c95f6e349b42f7eadedd975e35
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Tail Call
Commit: 81a6f13ac9a9c66edbbf03c7902d1ab31cf7c84b
https://github.com/dyninst/dyninst/commit/81a6f13ac9a9c66edbbf03c7902d1ab31cf7c84b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/registers/riscv64.h
Log Message:
-----------
Fix typo
Commit: dbc7ae9a0ef6167ee9736fbc2e3ffa4313bc9cf0
https://github.com/dyninst/dyninst/commit/dbc7ae9a0ef6167ee9736fbc2e3ffa4313bc9cf0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A dataflowAPI/sail/experimental/sail_semantics.json
A dataflowAPI/sail/experimental/sail_to_rose.pl
Log Message:
-----------
Add Experimental SAIL parser
Commit: 61bb87fb9ced0831e2c03cf198b553eed1171f3e
https://github.com/dyninst/dyninst/commit/61bb87fb9ced0831e2c03cf198b553eed1171f3e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dataflowAPI/src/ABI.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
Log Message:
-----------
Support DYNINST_CODEGEN_ARCH_RISCV64
Commit: 5fdbe11a34e5b75d39441a0b0bedba3a2d150a70
https://github.com/dyninst/dyninst/commit/5fdbe11a34e5b75d39441a0b0bedba3a2d150a70
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI_RT/src/RTlinux.c
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add missing CODEGEN
Commit: 8cc1077df0349aa7580d7c2b0b411c5ee835cfd7
https://github.com/dyninst/dyninst/commit/8cc1077df0349aa7580d7c2b0b411c5ee835cfd7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M dyninstAPI/src/unix.C
Log Message:
-----------
Disallow generating _init and _fini
Commit: 284ead16add61360d2cf514bd7e048aea7b80ca0
https://github.com/dyninst/dyninst/commit/284ead16add61360d2cf514bd7e048aea7b80ca0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Add c.ebreak
Commit: 714e0f5d9cdefede9e92a645a8120235287d3042
https://github.com/dyninst/dyninst/commit/714e0f5d9cdefede9e92a645a8120235287d3042
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
Log Message:
-----------
Remove annonying tab from github workflow
Commit: 6cf9a1a5b12f3ca69d99161b9c193517d5d286bc
https://github.com/dyninst/dyninst/commit/6cf9a1a5b12f3ca69d99161b9c193517d5d286bc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-08-03 (Sun, 03 Aug 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/Object.C
M symtabAPI/src/Object.h
Log Message:
-----------
Add MAFD extension detection
Compare: https://github.com/dyninst/dyninst/compare/ff224d70c4c8...6cf9a1a5b12f
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