[DynInst_API:] [dyninst/dyninst] 9d9966: Add RISC-V instruction mnemonics and registers


Date: Thu, 31 Jul 2025 21:30:25 -0700
From: wxrdnx <noreply@xxxxxxxxxx>
Subject: [DynInst_API:] [dyninst/dyninst] 9d9966: Add RISC-V instruction mnemonics and registers
  Branch: refs/heads/angushe/riscv-symtab-api
  Home:   https://github.com/dyninst/dyninst
  Commit: 9d9966579542d6c36312191cf6818ee97ec92516
      https://github.com/dyninst/dyninst/commit/9d9966579542d6c36312191cf6818ee97ec92516
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-31 (Thu, 31 Jul 2025)

  Changed paths:
    M common/CMakeLists.txt
    M common/h/Architecture.h
    M common/h/dyn_regs.h
    M common/h/entryIDs.h
    A common/h/mnemonics/riscv64_entryIDs.h
    A common/h/registers/riscv64_regs.h
    M common/src/registers/MachRegister.C
    M dataflowAPI/rose/registers/convert.C
    A dataflowAPI/rose/registers/riscv64.h
    M dataflowAPI/src/ExpressionConversionVisitor.C
    M dwarf/src/dwarfHandle.C
    M dwarf/src/registers/convert.C
    A dwarf/src/registers/riscv64.h
    M elf/src/Elf_X.C
    A external/rose/riscv64InstructionEnum.h
    M instructionAPI/capstone/import_mnemonics.py
    A instructionAPI/capstone/riscv64/mnemonics.py
    A instructionAPI/capstone/riscv64/registers.py
    M instructionAPI/src/Instruction.C
    M instructionAPI/src/interrupts.C
    M instructionAPI/src/syscalls.C
    M parseAPI/src/SymbolicExpression.C
    M proccontrol/src/process.C
    M symtabAPI/src/Object-elf.C
    M symtabAPI/src/emitElf.C
    A symtabAPI/src/emitElfStatic-riscv64.C
    M symtabAPI/src/emitElfStatic.C
    A symtabAPI/src/relocationEntry-elf-riscv64.C
    M tests/unit/MachRegister/base_registers/CMakeLists.txt
    A tests/unit/MachRegister/base_registers/riscv64.cpp
    M tests/unit/MachRegister/type_queries/CMakeLists.txt
    A tests/unit/MachRegister/type_queries/riscv64.cpp
    M tests/unit/dataflowAPI/rose/registers/CMakeLists.txt
    A tests/unit/dataflowAPI/rose/registers/riscv64.cpp

  Log Message:
  -----------
  Add RISC-V instruction mnemonics and registers


  Commit: 2c66483bb69425d06284d52d664c7d413be31e69
      https://github.com/dyninst/dyninst/commit/2c66483bb69425d06284d52d664c7d413be31e69
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-31 (Thu, 31 Jul 2025)

  Changed paths:
    M common/h/registers/riscv64_regs.h

  Log Message:
  -----------
  Declare register aliases with DEF_REGISTER_ALIAS


  Commit: 9dfdeedbb9ff9015f81ca279b14a8f3663878279
      https://github.com/dyninst/dyninst/commit/9dfdeedbb9ff9015f81ca279b14a8f3663878279
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-31 (Thu, 31 Jul 2025)

  Changed paths:
    M tests/unit/MachRegister/base_registers/riscv64.cpp

  Log Message:
  -----------
  Change f<N>_32 and f<N>_64 to alias check


  Commit: a619603413d8c2355d37e35a0aa9980fcfe5d2e3
      https://github.com/dyninst/dyninst/commit/a619603413d8c2355d37e35a0aa9980fcfe5d2e3
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-31 (Thu, 31 Jul 2025)

  Changed paths:
    M symtabAPI/src/Object-elf.C
    M symtabAPI/src/emitElf.C
    R symtabAPI/src/emitElfStatic-riscv64.C
    M symtabAPI/src/emitElfStatic.C
    R symtabAPI/src/relocationEntry-elf-riscv64.C

  Log Message:
  -----------
  Move RISC-V Elf parsing to #1966


  Commit: e276c072daed452e2a27d613df975a38e953935f
      https://github.com/dyninst/dyninst/commit/e276c072daed452e2a27d613df975a38e953935f
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2025-07-31 (Thu, 31 Jul 2025)

  Changed paths:
    M common/src/registers/MachRegister.C

  Log Message:
  -----------
  Fix syscall nr for FreeBSD


Compare: https://github.com/dyninst/dyninst/compare/7b75e02b3d3b...e276c072daed

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