Branch: refs/heads/angushe/riscv
Home: https://github.com/dyninst/dyninst
Commit: 9309bd38f48f8c5051789b1f98573097ede67641
https://github.com/dyninst/dyninst/commit/9309bd38f48f8c5051789b1f98573097ede67641
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M CMakeLists.txt
A cmake/tpls/DyninstCapstone.cmake
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Add CMake stub
Commit: 0bc2950edccb6f1c2b6182436b17f279e5da8a77
https://github.com/dyninst/dyninst/commit/0bc2950edccb6f1c2b6182436b17f279e5da8a77
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A instructionAPI/capstone/import.py
A instructionAPI/capstone/x86.py
Log Message:
-----------
Make parameter the root directory in import script
Instead of specifying the file name, the user just points to the
directory and the script will grab the necessary files.
Commit: faaf6c841d8c23511ee02049f54b709d1497acf1
https://github.com/dyninst/dyninst/commit/faaf6c841d8c23511ee02049f54b709d1497acf1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/capstone/import.py
M instructionAPI/capstone/x86.py
Log Message:
-----------
Alias faddp to fadd
Capstone only uses fadd. This does not modify the entryIDs yet.
Commit: a728c37ad0d02ddef387f7dc9e253169f4fda62d
https://github.com/dyninst/dyninst/commit/a728c37ad0d02ddef387f7dc9e253169f4fda62d
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/capstone/import.py
Log Message:
-----------
Add mnemonic translation to import script
Commit: d2a42ce3665ba7373392ded07801bb7af2020eff
https://github.com/dyninst/dyninst/commit/d2a42ce3665ba7373392ded07801bb7af2020eff
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A instructionAPI/src/x86/register-xlat.C
A instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
Add Capstone->Dyninst register translation
Commit: 21e270d0e9a8c32c765180423b333e5dfac603d7
https://github.com/dyninst/dyninst/commit/21e270d0e9a8c32c765180423b333e5dfac603d7
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A instructionAPI/src/x86/mnemonic-xlat.C
A instructionAPI/src/x86/mnemonic-xlat.h
Log Message:
-----------
Add Capstone->Dyninst mnemonic translation
Commit: 0472d9cf91c8b4682bfe39b4c8a57c7a0a26f4f3
https://github.com/dyninst/dyninst/commit/0472d9cf91c8b4682bfe39b4c8a57c7a0a26f4f3
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
A instructionAPI/src/x86/decoder.C
A instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add stub replacement for x86 decoder
Commit: 0fc136289a3fb33aa2ef3dfda9408d2288690bff
https://github.com/dyninst/dyninst/commit/0fc136289a3fb33aa2ef3dfda9408d2288690bff
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add decoder ctor and dtor
There is one usage of Capstone per decoder. This should be threadsafe
as it doesn't make sense to use a decoder with multiple threads
simultaneously. See comments in ctor for why there are two Capstone
handles per decoder.
Commit: a4dc3be45b4bc131f88204614d5ddefd785c5d63
https://github.com/dyninst/dyninst/commit/a4dc3be45b4bc131f88204614d5ddefd785c5d63
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add decodeOpcode
Commit: 04ab549ccdba4f9fa1d22b19476019114a6a9b8c
https://github.com/dyninst/dyninst/commit/04ab549ccdba4f9fa1d22b19476019114a6a9b8c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add note in decodeOperands
Commit: b8f55569fcd284fab151cd17901628bfa8baf504
https://github.com/dyninst/dyninst/commit/b8f55569fcd284fab151cd17901628bfa8baf504
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add doDelayedDecode
This is a copy/paste of Xiaozhu's implementation. It appears to be
incomplete (as per the comments).
Commit: 5b7d0a03a07abf280e9c0722bc106401cbff0eda
https://github.com/dyninst/dyninst/commit/5b7d0a03a07abf280e9c0722bc106401cbff0eda
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
stub -- refactor
Commit: d1dbd43909d5041f359f9a33e53935ec10105847
https://github.com/dyninst/dyninst/commit/d1dbd43909d5041f359f9a33e53935ec10105847
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Use disassembler object in decode_operands
Commit: eafe418c920ddf0ce9698300da0b56328acb5898
https://github.com/dyninst/dyninst/commit/eafe418c920ddf0ce9698300da0b56328acb5898
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Refactor decode_operands
This makes it much easier to follow.
Commit: deaa6e1d81e43ffcdf987f8bf687530b7ecdc9b2
https://github.com/dyninst/dyninst/commit/deaa6e1d81e43ffcdf987f8bf687530b7ecdc9b2
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add detailed comments about operand types
Commit: 2677f09055af20872da77742e46a98d149593904
https://github.com/dyninst/dyninst/commit/2677f09055af20872da77742e46a98d149593904
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use Instruction::makeReturnExpression
No need to reinvent the wheel.
Commit: 07bc44a46361f3b26efadfd39bff751fa8e0ff03
https://github.com/dyninst/dyninst/commit/07bc44a46361f3b26efadfd39bff751fa8e0ff03
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove redundant includes
Commit: 6cf82ab6ce7c0897088b8709869ad3725ad517a4
https://github.com/dyninst/dyninst/commit/6cf82ab6ce7c0897088b8709869ad3725ad517a4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor handling of implicit registers
By giving the properties names rather than std::pairs, it makes it much
easier to read.
Commit: c8e6b59e030ccaee33fe6a073235a9afa0735e33
https://github.com/dyninst/dyninst/commit/c8e6b59e030ccaee33fe6a073235a9afa0735e33
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Include decoding of {e,r}flags
Commit: e6b56c21ea061cbe3b07a8ce74ed240c8a7be99e
https://github.com/dyninst/dyninst/commit/e6b56c21ea061cbe3b07a8ce74ed240c8a7be99e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment for explicit operands
Commit: 8f9a0abe20fb2828bfb6affe786909b87d453f55
https://github.com/dyninst/dyninst/commit/8f9a0abe20fb2828bfb6affe786909b87d453f55
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix explicit operands example
Commit: 8dba6936f152a4cee64a16a216a4026b7b27e7df
https://github.com/dyninst/dyninst/commit/8dba6936f152a4cee64a16a216a4026b7b27e7df
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove extraneous namespace qualifier
Commit: aab30e81f69b0d51eab7e0b391d07099bb698bad
https://github.com/dyninst/dyninst/commit/aab30e81f69b0d51eab7e0b391d07099bb698bad
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor is_call
The original code did the nested check, but didn't need to.
if(cat == c_BranchInsn || cat == c_CallInsn) {
isCFT = true;
if(cat == c_CallInsn) {
isCall = true;
}
}
is equivalent to
if(cat == c_CallInsn) {
isCall = true;
}
if(cat == c_BranchInsn || isCall) {
isCFT = true;
}
Commit: 536367dc8ab28fbdcfff14638a65d0da6feec170
https://github.com/dyninst/dyninst/commit/536367dc8ab28fbdcfff14638a65d0da6feec170
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment in expand_eflags
Commit: a42d6ea5c5f7fd0dc0dc081be2189815a0b0b351
https://github.com/dyninst/dyninst/commit/a42d6ea5c5f7fd0dc0dc081be2189815a0b0b351
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/register-xlat.C
Log Message:
-----------
Fix comment for BND registers
Commit: 857a5eae17a4ad59dda62e8952f41655f17948d8
https://github.com/dyninst/dyninst/commit/857a5eae17a4ad59dda62e8952f41655f17948d8
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_reg
Commit: 05ddc49cdac7c1d18a49a39d4bc0df536471dcb4
https://github.com/dyninst/dyninst/commit/05ddc49cdac7c1d18a49a39d4bc0df536471dcb4
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_imm
Commit: e63abde9be45658634d6b5a0a70528f256aeb365
https://github.com/dyninst/dyninst/commit/e63abde9be45658634d6b5a0a70528f256aeb365
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed 64-bit values for immediates
Commit: 2a725e42d1eecffecdfd40350a47b603c812c568
https://github.com/dyninst/dyninst/commit/2a725e42d1eecffecdfd40350a47b603c812c568
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Update comment for relative branch immediates
Commit: c45e968508b594fc8f8046cca000d39401f92d94
https://github.com/dyninst/dyninst/commit/c45e968508b594fc8f8046cca000d39401f92d94
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove error check on size_to_type
It has been updated to include all values used by Capstone.
Commit: fdc645a5d01b00bd10882ca401dacfbabc13dce2
https://github.com/dyninst/dyninst/commit/fdc645a5d01b00bd10882ca401dacfbabc13dce2
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove unneeded assert
Commit: 2a2f132faf0f0038aa780d66ef4162c34b16680f
https://github.com/dyninst/dyninst/commit/2a2f132faf0f0038aa780d66ef4162c34b16680f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move is_call and is_cft to where they are used
Commit: b8bf32311f54ea195d0a46d741a8a3b04f6426a3
https://github.com/dyninst/dyninst/commit/b8bf32311f54ea195d0a46d741a8a3b04f6426a3
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed values for calculations
The manual says everything but the scale can be positive or negative.
Commit: be5af5ee99986a0b5a74e836eb486e57e58c86e9
https://github.com/dyninst/dyninst/commit/be5af5ee99986a0b5a74e836eb486e57e58c86e9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use braces
Commit: 21dcfea2b8f6d528086c893db198875f5695f0f2
https://github.com/dyninst/dyninst/commit/21dcfea2b8f6d528086c893db198875f5695f0f2
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move size_to_type to where it is used
Commit: b6d4153357c961b8c73a8ebfe710e9d22605c87b
https://github.com/dyninst/dyninst/commit/b6d4153357c961b8c73a8ebfe710e9d22605c87b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add some whitespace
Commit: d06cc109465e880179e22ba91df750310ffb8348
https://github.com/dyninst/dyninst/commit/d06cc109465e880179e22ba91df750310ffb8348
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add description from Intel manual
Commit: 0598d7e68c9eb166366d6eabe0a2c9be4fa2bb1f
https://github.com/dyninst/dyninst/commit/0598d7e68c9eb166366d6eabe0a2c9be4fa2bb1f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Return early if processing a CFT
Commit: 19fa0753b7ddb81b770e97aac1635ed154991354
https://github.com/dyninst/dyninst/commit/19fa0753b7ddb81b770e97aac1635ed154991354
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add comment about LEA
Commit: 9eaaae06a644cc080dbf2e5a054c00943999106f
https://github.com/dyninst/dyninst/commit/9eaaae06a644cc080dbf2e5a054c00943999106f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Rename immAST -> displacementAST
This better reflects its meaning.
Commit: 8a64354d5df4ad4749a832f045bb2998d58bb996
https://github.com/dyninst/dyninst/commit/8a64354d5df4ad4749a832f045bb2998d58bb996
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Handle segment registers as memory operands
Commit: a8cfa2b9f7d3fef6801d1f710c112334f4ed2182
https://github.com/dyninst/dyninst/commit/a8cfa2b9f7d3fef6801d1f710c112334f4ed2182
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Fix cmake formatting in instructionAPI/CMakeLists.txt
Commit: 05e5507da0b899f98a1c7008e758a8871b17809e
https://github.com/dyninst/dyninst/commit/05e5507da0b899f98a1c7008e758a8871b17809e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
M docker/dependencies.versions
Log Message:
-----------
Add dependency-version check for Capstone
Commit: bc0f0ae89e35a5b84df40a6308737bd163f0158d
https://github.com/dyninst/dyninst/commit/bc0f0ae89e35a5b84df40a6308737bd163f0158d
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Make Capstone a private dependency
Commit: ea84d4a5b3a1fad3876f13c02a4c2828976e179b
https://github.com/dyninst/dyninst/commit/ea84d4a5b3a1fad3876f13c02a4c2828976e179b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A docker/build_capstone.sh
M docker/dependencies.versions
Log Message:
-----------
Docker: add Capstone builds
Commit: 50831e5fa73e6235d84478baa643e30ebde260ac
https://github.com/dyninst/dyninst/commit/50831e5fa73e6235d84478baa643e30ebde260ac
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Only decode segment register operands for i386
Commit: dbfe19cd263f3ae688da35081bff01df15b2f315
https://github.com/dyninst/dyninst/commit/dbfe19cd263f3ae688da35081bff01df15b2f315
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix format from clang's -Wformat-pedantic
Commit: 05f4af4128dc936825f7f2dfea09ef4f6b5aa2b9
https://github.com/dyninst/dyninst/commit/05f4af4128dc936825f7f2dfea09ef4f6b5aa2b9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M cmake/tpls/DyninstCapstone.cmake
Log Message:
-----------
Use correct capitalization for capstone_ROOT in CMake
Commit: eb685b7845d29f4de3ad48f67145a2b43a1e6c1c
https://github.com/dyninst/dyninst/commit/eb685b7845d29f4de3ad48f67145a2b43a1e6c1c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/h/Architecture.h
M dwarf/src/dwarfHandle.C
Log Message:
-----------
Add riscv architecture
Commit: 2ef7d6e395e26108a9746dfd2cc1d2366025856c
https://github.com/dyninst/dyninst/commit/2ef7d6e395e26108a9746dfd2cc1d2366025856c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A instructionAPI/capstone/capstone.py
M instructionAPI/capstone/import.py
A instructionAPI/capstone/riscv64.py
Log Message:
-----------
Add riscv64 capstone parser
Commit: fe6261ecd74cbd21a5d424a9d936446444267532
https://github.com/dyninst/dyninst/commit/fe6261ecd74cbd21a5d424a9d936446444267532
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/CMakeLists.txt
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/h/mnemonics/riscv64_entryIDs.h
A common/h/registers/riscv64_regs.h
A common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add RISC-V registers and mnemonics
Commit: 7fb91eb722ef059a46ed0559a620157a53510f3a
https://github.com/dyninst/dyninst/commit/7fb91eb722ef059a46ed0559a620157a53510f3a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M elf/src/Elf_X.C
M proccontrol/src/process.C
Log Message:
-----------
Add cases for Arch_riscv64 to suppress compiler warnings
Commit: e878cf6a0799ede6e44e95972964422b7fb66d7b
https://github.com/dyninst/dyninst/commit/e878cf6a0799ede6e44e95972964422b7fb66d7b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
M instructionAPI/capstone/import.py
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
A instructionAPI/src/InstructionDecoder-Capstone.C
A instructionAPI/src/InstructionDecoder-Capstone.h
A instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/InstructionDecoderImpl.C
Log Message:
-----------
Add Capstone-based RISC-V InstructionAPI
Commit: 893165d9ce6c3c5000888db44a5c4495cbbb1a4c
https://github.com/dyninst/dyninst/commit/893165d9ce6c3c5000888db44a5c4495cbbb1a4c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M parseAPI/CMakeLists.txt
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
A parseAPI/src/IA_riscv64.C
A parseAPI/src/IA_riscv64.h
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Add RISC-V ParseAPI
Commit: 0ab8804b94d2453afe39d9394b6d748dd499d9fd
https://github.com/dyninst/dyninst/commit/0ab8804b94d2453afe39d9394b6d748dd499d9fd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A dataflowAPI/rose/SgAsmRiscv64Instruction.h
M dataflowAPI/rose/conversions.h
A dataflowAPI/rose/semantics/DispatcherRiscv64.C
A dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/RoseInsnFactory.h
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
A external/rose/riscv64InstructionEnum.h
M external/rose/rose-compat.h
Log Message:
-----------
Implement RISC-V DataflowAPI base code
Commit: 518cedbe58175eba6a8626f1307615f7c347b174
https://github.com/dyninst/dyninst/commit/518cedbe58175eba6a8626f1307615f7c347b174
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A dataflowAPI/sail/riscv_sail_to_rose.pl
A dataflowAPI/sail/sail_ast.pl
A dataflowAPI/sail/sail_lex.pl
A dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add sail lexical parser
Commit: 369e733321788d33b54bea5e9fd7f65762ae9488
https://github.com/dyninst/dyninst/commit/369e733321788d33b54bea5e9fd7f65762ae9488
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
rewrite sail lexer using regex
Commit: 3ca2a4b165c2d29ccaf4bd26f5e5a8790046cc4c
https://github.com/dyninst/dyninst/commit/3ca2a4b165c2d29ccaf4bd26f5e5a8790046cc4c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
Use array instead of hash
Commit: 2a41ced484d0b7ac58363b526fd1e24193300cf5
https://github.com/dyninst/dyninst/commit/2a41ced484d0b7ac58363b526fd1e24193300cf5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add most syntax
Commit: 4349e052f11c556628fc475c5e2b732900d5977b
https://github.com/dyninst/dyninst/commit/4349e052f11c556628fc475c5e2b732900d5977b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A dataflowAPI/sail/riscv_ast.json
R dataflowAPI/sail/riscv_sail_to_rose.pl
R dataflowAPI/sail/sail_ast.pl
R dataflowAPI/sail/sail_lex.pl
R dataflowAPI/sail/sail_syntax.pl
A dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (UTYPE)
Commit: 47b1cd00def1522756380d5e4fecac1a544a6ca3
https://github.com/dyninst/dyninst/commit/47b1cd00def1522756380d5e4fecac1a544a6ca3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/h/Architecture.h
Log Message:
-----------
Add missing riscv64 address width
Commit: 226167ab26c90076a718f87ce43f13a17dabab8c
https://github.com/dyninst/dyninst/commit/226167ab26c90076a718f87ce43f13a17dabab8c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (IMAC subsets)
Commit: 8041dfb3da4d2956dd69b3f049fc63f25e1ed42d
https://github.com/dyninst/dyninst/commit/8041dfb3da4d2956dd69b3f049fc63f25e1ed42d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Integrate riscv64 ROSE code into dataflowAPI
Commit: 79215e320517b1d97c24f21623ec82982fa384c9
https://github.com/dyninst/dyninst/commit/79215e320517b1d97c24f21623ec82982fa384c9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
R instructionAPI/src/x86/decoder.C
R instructionAPI/src/x86/decoder.h
R instructionAPI/src/x86/mnemonic-xlat.C
R instructionAPI/src/x86/mnemonic-xlat.h
R instructionAPI/src/x86/register-xlat.C
R instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
migrate instructionAPI to capstone
Commit: 27dabd51e31175aeb74a910c30ed96e59b476a0d
https://github.com/dyninst/dyninst/commit/27dabd51e31175aeb74a910c30ed96e59b476a0d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/BaseSemantics2.h
A dataflowAPI/rose/semantics/ConcreteSemantics2.C
A dataflowAPI/rose/semantics/ConcreteSemantics2.h
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/SymEvalPolicy.h
Log Message:
-----------
fix mulhsu instruction semantic
Commit: a1ea83c2b3e401a60da0ec39341d6421b458ba9f
https://github.com/dyninst/dyninst/commit/a1ea83c2b3e401a60da0ec39341d6421b458ba9f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M cmake/DyninstPlatform.cmake
M cmake/tpls/DyninstCapstone.cmake
M common/CMakeLists.txt
A common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/src/ABI.C
M dataflowAPI/src/RegisterMap.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
A dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
A dyninstAPI/src/codegen-riscv64.C
A dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.h
A dyninstAPI/src/emit-riscv64.C
A dyninstAPI/src/emit-riscv64.h
A dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/mapped_object.C
A dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
M dyninstAPI_RT/CMakeLists.txt
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/CMakeLists.txt
M proccontrol/src/linux.C
M proccontrol/src/linux.h
A proccontrol/src/loadLibrary/codegen-riscv64.C
M proccontrol/src/loadLibrary/codegen.C
M proccontrol/src/loadLibrary/codegen.h
A proccontrol/src/riscv_process.C
A proccontrol/src/riscv_process.h
Log Message:
-----------
Add RISC-V guards
Commit: 312144c328668d66a5d4bf68bf8849b00344dc6b
https://github.com/dyninst/dyninst/commit/312144c328668d66a5d4bf68bf8849b00344dc6b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/function.h
M dyninstAPI/src/linux.C
M stackwalk/CMakeLists.txt
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/framestepper.C
A stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/linux-swk.C
A stackwalk/src/riscv64-swk.C
A stackwalk/src/riscv64-swk.h
M symtabAPI/CMakeLists.txt
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add RISC-V stackwalk guard
Commit: 7cbf5a8639b1594e8a9d4fcc9334e7a91782e913
https://github.com/dyninst/dyninst/commit/7cbf5a8639b1594e8a9d4fcc9334e7a91782e913
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A dyninstAPI_RT/src/RTthread-riscv64.c
Log Message:
-----------
Add missing RTthread-riscv64.c
Commit: c0bb72f7d72ce7207e61ecd9c40008b3bc32c1f5
https://github.com/dyninst/dyninst/commit/c0bb72f7d72ce7207e61ecd9c40008b3bc32c1f5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A symtabAPI/src/emitElfStatic-riscv64.C
A symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Create RISC-V emitter template
Commit: e9a9b520a863ca114748f4003166af52400dd396
https://github.com/dyninst/dyninst/commit/e9a9b520a863ca114748f4003166af52400dd396
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A dyninstAPI_RT/src/RTstatic_ctors_dtors-riscv64.c
Log Message:
-----------
Add missing RTstatic_ctors_dtors-riscv64.c
Commit: 0ff2df8e3daa15f095b0a6c3e7b3c21b938b9640
https://github.com/dyninst/dyninst/commit/0ff2df8e3daa15f095b0a6c3e7b3c21b938b9640
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dataflowAPI/src/RegisterMap.h
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/RegisterConversion-riscv64.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
A dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/linux-riscv64.C
A dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-riscv64.C
M dyninstAPI/src/unix.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/src/emitElfStatic-stub.C
Log Message:
-----------
Make RISC-V dyninst compile on a RISC-V machine
Commit: da37f89ab2ac85a8fcd4ce17c843d0b7ee41987d
https://github.com/dyninst/dyninst/commit/da37f89ab2ac85a8fcd4ce17c843d0b7ee41987d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
Log Message:
-----------
Implement some instruction emission functions
Commit: 0b0cb85f92a8ab7366fdd41ffdd3df8ce53c11e3
https://github.com/dyninst/dyninst/commit/0b0cb85f92a8ab7366fdd41ffdd3df8ce53c11e3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/registerSpace.h
M external/rose/riscv64InstructionEnum.h
Log Message:
-----------
Amalgamate 32 and 64 bit fpr
Commit: c3d931eec1061eb0d8417d937e6b55a826b55e62
https://github.com/dyninst/dyninst/commit/c3d931eec1061eb0d8417d937e6b55a826b55e62
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Add emitImm
Commit: 4d0613e0bb38b14c1fa4c655f5a862e887872810
https://github.com/dyninst/dyninst/commit/4d0613e0bb38b14c1fa4c655f5a862e887872810
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/src/ABI.C
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/src/linux.C
M stackwalk/src/dbginfo-stepper.C
Log Message:
-----------
Rename arch_riscv64 to DYNINST_HOST_ARCH_AARCH64
Commit: 7220500fdf0a85d69a0c4cfdbc063d1eaae14260
https://github.com/dyninst/dyninst/commit/7220500fdf0a85d69a0c4cfdbc063d1eaae14260
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/CMakeLists.txt
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/convert.C
A dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/convertOpcodes.C
M dwarf/CMakeLists.txt
M dwarf/src/registers/convert.C
A dwarf/src/registers/riscv64.h
M dyninstAPI/src/inst-riscv64.h
M external/rose/riscv64InstructionEnum.h
M parseAPI/CMakeLists.txt
Log Message:
-----------
Add missing RISC-V ROSE register conversion
Commit: fab0788a2fe06c8deaeff127f3a37453af444828
https://github.com/dyninst/dyninst/commit/fab0788a2fe06c8deaeff127f3a37453af444828
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Add missing invalid operand check
Commit: 513f50422cbfc35608ab5b6306bda027691d2d82
https://github.com/dyninst/dyninst/commit/513f50422cbfc35608ab5b6306bda027691d2d82
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/RoseInsnFactory.h
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/mapped_object.C
M instructionAPI/h/Instruction.h
M instructionAPI/src/InstructionDecoder-Capstone.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/interrupts.C
M instructionAPI/src/syscalls.C
M parseAPI/CMakeLists.txt
M parseAPI/src/IA_riscv64.C
M stackwalk/CMakeLists.txt
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/CMakeLists.txt
Log Message:
-----------
Modify RISC-V Capstone instruction decoder
Commit: decae46e3fd2cc35c6681bbf1fb5dde9e19c343f
https://github.com/dyninst/dyninst/commit/decae46e3fd2cc35c6681bbf1fb5dde9e19c343f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add C-Type Emitter
Commit: 2cc292920f4fc13c811101acd458d141469a9342
https://github.com/dyninst/dyninst/commit/2cc292920f4fc13c811101acd458d141469a9342
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add Load Immediate
Commit: d309540f00b0cf869773df8039fb09a2f6615b24
https://github.com/dyninst/dyninst/commit/d309540f00b0cf869773df8039fb09a2f6615b24
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Change insn_size to is_compressed
Commit: 3c78f640ddb47934690ab7bb36da6c9690cdb263
https://github.com/dyninst/dyninst/commit/3c78f640ddb47934690ab7bb36da6c9690cdb263
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add addi codegen
Commit: 5643f41dc26582382f78bb836dd935cc0161c88b
https://github.com/dyninst/dyninst/commit/5643f41dc26582382f78bb836dd935cc0161c88b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Optimize addi Code Generation
Commit: 7b05fb886e0c64064aa746828edbd8f16093826a
https://github.com/dyninst/dyninst/commit/7b05fb886e0c64064aa746828edbd8f16093826a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI/CMakeLists.txt
M dyninstAPI_RT/CMakeLists.txt
Log Message:
-----------
Fix DYNINST_ARCH_riscv64
Commit: 9728792c4152a3d8c0013d412ee97e5bbd15a6ca
https://github.com/dyninst/dyninst/commit/9728792c4152a3d8c0013d412ee97e5bbd15a6ca
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/src/ABI.C
Log Message:
-----------
Add RISC-V initialize64
Commit: 940028a33764041cacdb070e1de99a04d08b7622
https://github.com/dyninst/dyninst/commit/940028a33764041cacdb070e1de99a04d08b7622
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Parsing-arch.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-aarch64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/parse-cfg.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/CMakeLists.txt
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Rebase and fix code generation
Commit: 9ca4c725f1b5284074113f6cedba54c2be84e6e4
https://github.com/dyninst/dyninst/commit/9ca4c725f1b5284074113f6cedba54c2be84e6e4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V jump instruction generation
Commit: 67d3b5ab748a383a674fc17ed7d1dc3b1c3e04c3
https://github.com/dyninst/dyninst/commit/67d3b5ab748a383a674fc17ed7d1dc3b1c3e04c3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/linux-riscv64-swk.C
Log Message:
-----------
Change gregs to __gregs
Commit: e44358391d509ab266a1eb7189896f485c0ecdb0
https://github.com/dyninst/dyninst/commit/e44358391d509ab266a1eb7189896f485c0ecdb0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V Long Branch
Commit: d33888c64886ea92622c1c5b5e254b4bbc01f3fd
https://github.com/dyninst/dyninst/commit/d33888c64886ea92622c1c5b5e254b4bbc01f3fd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite shifts and constants in RISC-V codegen
Commit: 681cd96e48d5697aca5102414e3e0f5acbe8ba2b
https://github.com/dyninst/dyninst/commit/681cd96e48d5697aca5102414e3e0f5acbe8ba2b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix wrong indexing order in INSN_SET
Commit: 6b96dbf976fb550e577029f62acaeab5c4816d5b
https://github.com/dyninst/dyninst/commit/6b96dbf976fb550e577029f62acaeab5c4816d5b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite load and store using I-Type and S-Type generator
Commit: a66fce14f60cc9934e463007904a8e2dc8a0ac62
https://github.com/dyninst/dyninst/commit/a66fce14f60cc9934e463007904a8e2dc8a0ac62
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Finish emit basic operators
Commit: 5fa0e819f1629d2809136de229c5602171ef97a1
https://github.com/dyninst/dyninst/commit/5fa0e819f1629d2809136de229c5602171ef97a1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Add conditional branch
Commit: 2979bf68a4ce8179690a536f7144dc8a01949f5e
https://github.com/dyninst/dyninst/commit/2979bf68a4ce8179690a536f7144dc8a01949f5e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish emit-riscv64.C
Commit: 22f94b2a7e031fa548d1e51e74bca63164c3c7fc
https://github.com/dyninst/dyninst/commit/22f94b2a7e031fa548d1e51e74bca63164c3c7fc
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
M dataflowAPI/rose/registers/convert.C
M dataflowAPI/rose/registers/riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Finish inst-riscv64.C
Commit: 8828d7b511edf048899f171a9dfcad64b3e0821c
https://github.com/dyninst/dyninst/commit/8828d7b511edf048899f171a9dfcad64b3e0821c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
Log Message:
-----------
Rewrite RISC-V Branch
Commit: d998b92c06f1608051fc4934485e816334f691a2
https://github.com/dyninst/dyninst/commit/d998b92c06f1608051fc4934485e816334f691a2
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Make dyninstAPI compile
Commit: b1280ec81c9359309bc24dfa15ca65f64f5ce532
https://github.com/dyninst/dyninst/commit/b1280ec81c9359309bc24dfa15ca65f64f5ce532
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Update MachRegister
Commit: 0ddabe8c4749a384d206201145b37885281edeab
https://github.com/dyninst/dyninst/commit/0ddabe8c4749a384d206201145b37885281edeab
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M parseAPI/h/CFGModifier.h
M parseAPI/src/BoundFactCalculator.C
Log Message:
-----------
Fixed missing RISC-V BoundFact
Commit: 417fbe5d45ad9469835cf51d3a59250453c55a1c
https://github.com/dyninst/dyninst/commit/417fbe5d45ad9469835cf51d3a59250453c55a1c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Incorrect plt entry
Commit: f0066b53197f5660bac28b6a90308dcd752a5ec5
https://github.com/dyninst/dyninst/commit/f0066b53197f5660bac28b6a90308dcd752a5ec5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
A instructionAPI/src/.gdb_history
M instructionAPI/src/InstructionCategories.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix RISC-V bugs in Instruction API
Commit: af23a17e41e1a05329068d459b554c087842b5ef
https://github.com/dyninst/dyninst/commit/af23a17e41e1a05329068d459b554c087842b5ef
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
M instructionAPI/h/Operation_impl.h
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix some bugs
Commit: 6d08341d5019a656f39e764f4f0d0929423e6b61
https://github.com/dyninst/dyninst/commit/6d08341d5019a656f39e764f4f0d0929423e6b61
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix Segfault in pointer casting
Commit: 7951e8b7f34447c2054224eaf86dc66f1006105e
https://github.com/dyninst/dyninst/commit/7951e8b7f34447c2054224eaf86dc66f1006105e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/registers/riscv64.h
Log Message:
-----------
Fix ROSE register conversion I forgot to change after rebase
Commit: 03a64e086fb4d0649beb5a3e2617d80bb537be9b
https://github.com/dyninst/dyninst/commit/03a64e086fb4d0649beb5a3e2617d80bb537be9b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/Instruction.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Add register massaging to jalr
Commit: 57993a4f0c9d8e3f585167d53f16f5134d9c0abf
https://github.com/dyninst/dyninst/commit/57993a4f0c9d8e3f585167d53f16f5134d9c0abf
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
M dyninstAPI/src/Relocation/Transformers/Movement-adhoc.C
M dyninstAPI/src/registerSpace.h
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Fix jr instruction and incorrect fp
Commit: bec88d740abd8f917f5179f6a7829f1004a29ad2
https://github.com/dyninst/dyninst/commit/bec88d740abd8f917f5179f6a7829f1004a29ad2
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Revert wrong readRegister fix
Commit: 6d867ea0a179952d839e67b6738d3d9dfcbc6d79
https://github.com/dyninst/dyninst/commit/6d867ea0a179952d839e67b6738d3d9dfcbc6d79
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M instructionAPI/src/Instruction.C
M parseAPI/src/IA_riscv64.C
Log Message:
-----------
Fix isReturn bug
Commit: bf13a67fdf8acc2ad1f849d0ab12a0aac69aa207
https://github.com/dyninst/dyninst/commit/bf13a67fdf8acc2ad1f849d0ab12a0aac69aa207
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/src/RegisterMap.C
Log Message:
-----------
Fixed ud2 in RegisterMap
Commit: c64e1b1852c0308b4798fb3b116ebff49e8dbb0a
https://github.com/dyninst/dyninst/commit/c64e1b1852c0308b4798fb3b116ebff49e8dbb0a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Add riscv attribute
Commit: 929fed8b62a90f6684276c278b0ae476a2cd9ea8
https://github.com/dyninst/dyninst/commit/929fed8b62a90f6684276c278b0ae476a2cd9ea8
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Make Dyninst recognize .riscv.attributes
Commit: e5ba0d36c8cd8648f85c2e4d4950b6b1eb93ead3
https://github.com/dyninst/dyninst/commit/e5ba0d36c8cd8648f85c2e4d4950b6b1eb93ead3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix bug parsing .riscv.attributes
Commit: 53267d4f788c5b0920f4d2f5355362b0e3b78f52
https://github.com/dyninst/dyninst/commit/53267d4f788c5b0920f4d2f5355362b0e3b78f52
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Fix incorrect relocation category
Commit: 0fca0ad183b45e90dac0cff7283edd778b75671d
https://github.com/dyninst/dyninst/commit/0fca0ad183b45e90dac0cff7283edd778b75671d
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Don't know why I missed getRelTypeByElfMachine
Commit: 0d8923222c68b5ecb6b9adec20b23d747242df47
https://github.com/dyninst/dyninst/commit/0d8923222c68b5ecb6b9adec20b23d747242df47
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
ifdef for libelf compatilibity
Commit: b7369c5f7119453ffb203584bbe60da68ebf6402
https://github.com/dyninst/dyninst/commit/b7369c5f7119453ffb203584bbe60da68ebf6402
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add library adjust
Commit: 44853d8b907a15f1048854b3912a88cf7c3e88aa
https://github.com/dyninst/dyninst/commit/44853d8b907a15f1048854b3912a88cf7c3e88aa
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/emitElf.C
Log Message:
-----------
Add preinit array
Commit: a38756610b5bb694ac87b68a2dd8586e353ca1dd
https://github.com/dyninst/dyninst/commit/a38756610b5bb694ac87b68a2dd8586e353ca1dd
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/emitElf.C
Log Message:
-----------
Fix incorrect uleb128 parsing
Commit: bee54a8124e91ead9e57a70b9f3c51d68f885030
https://github.com/dyninst/dyninst/commit/bee54a8124e91ead9e57a70b9f3c51d68f885030
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
Log Message:
-----------
Fix tag variable shadowing
Commit: 60ce8e1ff1a44a5b358ed54f9b6bbe93347ff52a
https://github.com/dyninst/dyninst/commit/60ce8e1ff1a44a5b358ed54f9b6bbe93347ff52a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/emitElf.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Null instrumentation now works
Commit: a441b166ca3ced2dcdf798d73a0e0550ee214ed0
https://github.com/dyninst/dyninst/commit/a441b166ca3ced2dcdf798d73a0e0550ee214ed0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix incorrect parentheses and generateLoadImm
Commit: 051f2da1c3bb10d5a1baed2d9eb86e6fb96e4945
https://github.com/dyninst/dyninst/commit/051f2da1c3bb10d5a1baed2d9eb86e6fb96e4945
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
is_compressed should be true for C instructions
Commit: 2143dd7bf20168070aa560c07746f91bec35aef7
https://github.com/dyninst/dyninst/commit/2143dd7bf20168070aa560c07746f91bec35aef7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/src/RoseInsnFactory.C
Log Message:
-----------
Fix inconsistency between Capstone and ROSE
Commit: 3ac9f563f151ddfd741e18936762287732ef11d5
https://github.com/dyninst/dyninst/commit/3ac9f563f151ddfd741e18936762287732ef11d5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/src/RoseInsnFactory.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Hardwire x0 to 0
Commit: 859f784cc76a093721f5ed5db063f725a872dd50
https://github.com/dyninst/dyninst/commit/859f784cc76a093721f5ed5db063f725a872dd50
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-aarch64.C
Log Message:
-----------
Readd disappeared codegen in aarch64
Commit: 2ed08552b9fc1511349682543fe8b57d70b3aaa3
https://github.com/dyninst/dyninst/commit/2ed08552b9fc1511349682543fe8b57d70b3aaa3
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
emitLoadRelative and emitStoreRelative should be implemented
Commit: fdf370aadb6e883d2eff2cc3edb7367a9d9ac7f6
https://github.com/dyninst/dyninst/commit/fdf370aadb6e883d2eff2cc3edb7367a9d9ac7f6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
remove evil constants
Commit: b740a4219b710beca7e494acae7330990b912f75
https://github.com/dyninst/dyninst/commit/b740a4219b710beca7e494acae7330990b912f75
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
Log Message:
-----------
RISC-V CFWidget
Commit: b457b1170c78d85725742ff24f7f93d7e614380a
https://github.com/dyninst/dyninst/commit/b457b1170c78d85725742ff24f7f93d7e614380a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
Log Message:
-----------
RISC-V PCWidget
Commit: 74c9ede82bd363bdc2a9c26e5c950537c0a18970
https://github.com/dyninst/dyninst/commit/74c9ede82bd363bdc2a9c26e5c950537c0a18970
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
Log Message:
-----------
Add flag to compressed instructions generation
Commit: 65e391e97a12d249e2311fc969b9db45d4b7600b
https://github.com/dyninst/dyninst/commit/65e391e97a12d249e2311fc969b9db45d4b7600b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/emit-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/req.txt
Log Message:
-----------
Huge update
Commit: c88b0bc4b6856489ebb37ef3ee0d15cac50b256b
https://github.com/dyninst/dyninst/commit/c88b0bc4b6856489ebb37ef3ee0d15cac50b256b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-aarch64.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Split codegen into multiple of 16 bits
Commit: d5b50810473514f34911b5815e5ce58dffbb779b
https://github.com/dyninst/dyninst/commit/d5b50810473514f34911b5815e5ce58dffbb779b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix indexing issue
Commit: fe93703c3511142558a6332e21cbca5158db10a6
https://github.com/dyninst/dyninst/commit/fe93703c3511142558a6332e21cbca5158db10a6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix RISC-V ret bugs
Commit: f01a840cc36d456e2e39b3c7f2bd852473114a84
https://github.com/dyninst/dyninst/commit/f01a840cc36d456e2e39b3c7f2bd852473114a84
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Fix stack and instruction bugs
Commit: b00148e8768159890dbc9934adc0498edc320d86
https://github.com/dyninst/dyninst/commit/b00148e8768159890dbc9934adc0498edc320d86
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix long branch bug
Commit: 93a7736e40c7e212a28b8e059f6412de47952eb0
https://github.com/dyninst/dyninst/commit/93a7736e40c7e212a28b8e059f6412de47952eb0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add modifyData and fix auipc jalr bug
Commit: d6ac47caf3cb8fbedda74605a3e73e3d5a924567
https://github.com/dyninst/dyninst/commit/d6ac47caf3cb8fbedda74605a3e73e3d5a924567
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M proccontrol/src/riscv_process.C
Log Message:
-----------
Add Marco's patch
Commit: 0805a8f1d7b61cdfdbf5c2527ead3f2c662a0537
https://github.com/dyninst/dyninst/commit/0805a8f1d7b61cdfdbf5c2527ead3f2c662a0537
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Change PC to read PC register
Commit: 0c6c865114d617e8ab66ccb041bf3cfc85bbcae0
https://github.com/dyninst/dyninst/commit/0c6c865114d617e8ab66ccb041bf3cfc85bbcae0
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Patch RISC-V SAIL parser
Commit: ca62ae01b0d2d46dbe573010dac37daf52976e5a
https://github.com/dyninst/dyninst/commit/ca62ae01b0d2d46dbe573010dac37daf52976e5a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/Object-elf.C
M symtabAPI/src/Object-elf.h
Log Message:
-----------
Fix parse_riscv_attribute API
Commit: 932cd8550a9ca5b93954c85015feb915a1a3a4d5
https://github.com/dyninst/dyninst/commit/932cd8550a9ca5b93954c85015feb915a1a3a4d5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
M parseAPI/src/IA_riscv64.C
M proccontrol/src/riscv_process.C
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Fix include arch-riscv64.h
Commit: 530a35c0fa9f4874cfa9c95852db3d4ae7e63463
https://github.com/dyninst/dyninst/commit/530a35c0fa9f4874cfa9c95852db3d4ae7e63463
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M symtabAPI/src/emitElfStatic-riscv64.C
Log Message:
-----------
Revert emitElfStatic-riscv64.C
Commit: f5977d7073ebc83e1cb86388f406ca307a8e7093
https://github.com/dyninst/dyninst/commit/f5977d7073ebc83e1cb86388f406ca307a8e7093
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-04-27 (Sun, 27 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
64 -> XLENBITS
Compare: https://github.com/dyninst/dyninst/compare/fc36c02a90f4...f5977d7073eb
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