Branch: refs/heads/angushe/riscv
Home: https://github.com/dyninst/dyninst
Commit: 772f5a29b1a91c45de4400fcd6f3d99dc76338e8
https://github.com/dyninst/dyninst/commit/772f5a29b1a91c45de4400fcd6f3d99dc76338e8
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M CMakeLists.txt
A cmake/tpls/DyninstCapstone.cmake
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Add CMake stub
Commit: 62ba12cd011e065cbd727aa12b616530819359dc
https://github.com/dyninst/dyninst/commit/62ba12cd011e065cbd727aa12b616530819359dc
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A instructionAPI/capstone/import.py
A instructionAPI/capstone/x86.py
Log Message:
-----------
Make parameter the root directory in import script
Instead of specifying the file name, the user just points to the
directory and the script will grab the necessary files.
Commit: 0c11132100c0872c67f66ea2dfa789d64ba2cf0b
https://github.com/dyninst/dyninst/commit/0c11132100c0872c67f66ea2dfa789d64ba2cf0b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/capstone/import.py
M instructionAPI/capstone/x86.py
Log Message:
-----------
Alias faddp to fadd
Capstone only uses fadd. This does not modify the entryIDs yet.
Commit: f74de5db54829d19568de30fe1f822d3e4733989
https://github.com/dyninst/dyninst/commit/f74de5db54829d19568de30fe1f822d3e4733989
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/capstone/import.py
Log Message:
-----------
Add mnemonic translation to import script
Commit: ba23f0cf0aaf764f40f23e3bb47cf7664c5ac86f
https://github.com/dyninst/dyninst/commit/ba23f0cf0aaf764f40f23e3bb47cf7664c5ac86f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A instructionAPI/src/x86/register-xlat.C
A instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
Add Capstone->Dyninst register translation
Commit: d9ebcf25f1b08278c6582de203a10860ed1db5a5
https://github.com/dyninst/dyninst/commit/d9ebcf25f1b08278c6582de203a10860ed1db5a5
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A instructionAPI/src/x86/mnemonic-xlat.C
A instructionAPI/src/x86/mnemonic-xlat.h
Log Message:
-----------
Add Capstone->Dyninst mnemonic translation
Commit: 0c9b3102e5750efeda1c9cfb0527dec0f2842073
https://github.com/dyninst/dyninst/commit/0c9b3102e5750efeda1c9cfb0527dec0f2842073
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
A instructionAPI/src/x86/decoder.C
A instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add stub replacement for x86 decoder
Commit: 0e4021cc311645239a60161d5fd32e715d0a63f6
https://github.com/dyninst/dyninst/commit/0e4021cc311645239a60161d5fd32e715d0a63f6
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add decoder ctor and dtor
There is one usage of Capstone per decoder. This should be threadsafe
as it doesn't make sense to use a decoder with multiple threads
simultaneously. See comments in ctor for why there are two Capstone
handles per decoder.
Commit: 12494cae3f38f09fdc954e54e5fb6300617a6ce9
https://github.com/dyninst/dyninst/commit/12494cae3f38f09fdc954e54e5fb6300617a6ce9
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add decodeOpcode
Commit: 8aa5a603c35bb1503c8e7516cac8b68f1c8e8c58
https://github.com/dyninst/dyninst/commit/8aa5a603c35bb1503c8e7516cac8b68f1c8e8c58
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add note in decodeOperands
Commit: 38800db28df4f45162560db26fccecef2b489202
https://github.com/dyninst/dyninst/commit/38800db28df4f45162560db26fccecef2b489202
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Add doDelayedDecode
This is a copy/paste of Xiaozhu's implementation. It appears to be
incomplete (as per the comments).
Commit: 882a1b3b7f467e00e5fd11814a73de8985c5fa4f
https://github.com/dyninst/dyninst/commit/882a1b3b7f467e00e5fd11814a73de8985c5fa4f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
stub -- refactor
Commit: 031872c6d1fd651d9205055d579440b6eddf46cd
https://github.com/dyninst/dyninst/commit/031872c6d1fd651d9205055d579440b6eddf46cd
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Use disassembler object in decode_operands
Commit: ca707f66bb2e21bbe3d8ae4d1d2de960bf842e0c
https://github.com/dyninst/dyninst/commit/ca707f66bb2e21bbe3d8ae4d1d2de960bf842e0c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
M instructionAPI/src/x86/decoder.h
Log Message:
-----------
Refactor decode_operands
This makes it much easier to follow.
Commit: ff7829acdc9bcb3e6b9c9cdc88d02c394e677818
https://github.com/dyninst/dyninst/commit/ff7829acdc9bcb3e6b9c9cdc88d02c394e677818
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add detailed comments about operand types
Commit: 1219d77f85dcd50f2690e111d3541e93b2ae0c74
https://github.com/dyninst/dyninst/commit/1219d77f85dcd50f2690e111d3541e93b2ae0c74
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use Instruction::makeReturnExpression
No need to reinvent the wheel.
Commit: d4040ccb731ee64fd20125ac69529ba839d0313e
https://github.com/dyninst/dyninst/commit/d4040ccb731ee64fd20125ac69529ba839d0313e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove redundant includes
Commit: a398459be281fc096d986b7d47fe55241354e580
https://github.com/dyninst/dyninst/commit/a398459be281fc096d986b7d47fe55241354e580
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor handling of implicit registers
By giving the properties names rather than std::pairs, it makes it much
easier to read.
Commit: 22d566523b9bb863f5dfe679e15ca43cafe0ccec
https://github.com/dyninst/dyninst/commit/22d566523b9bb863f5dfe679e15ca43cafe0ccec
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Include decoding of {e,r}flags
Commit: 130c8e8af478efdcf01d60b5d53b9c97d5423dee
https://github.com/dyninst/dyninst/commit/130c8e8af478efdcf01d60b5d53b9c97d5423dee
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment for explicit operands
Commit: dd39aa2b4d6d2d65002e31c80a41636ec947bb8b
https://github.com/dyninst/dyninst/commit/dd39aa2b4d6d2d65002e31c80a41636ec947bb8b
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix explicit operands example
Commit: 6ff823867feda09f892d510efb70b39d5052b0cc
https://github.com/dyninst/dyninst/commit/6ff823867feda09f892d510efb70b39d5052b0cc
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove extraneous namespace qualifier
Commit: 2354e42446873b7dff877d7d6817594633f8b012
https://github.com/dyninst/dyninst/commit/2354e42446873b7dff877d7d6817594633f8b012
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor is_call
The original code did the nested check, but didn't need to.
if(cat == c_BranchInsn || cat == c_CallInsn) {
isCFT = true;
if(cat == c_CallInsn) {
isCall = true;
}
}
is equivalent to
if(cat == c_CallInsn) {
isCall = true;
}
if(cat == c_BranchInsn || isCall) {
isCFT = true;
}
Commit: 95fd5588dbfc3208ed86ea96a2cffa78a4cdf0dc
https://github.com/dyninst/dyninst/commit/95fd5588dbfc3208ed86ea96a2cffa78a4cdf0dc
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix comment in expand_eflags
Commit: edbcabe072401f56336b82a8cd5c845089185843
https://github.com/dyninst/dyninst/commit/edbcabe072401f56336b82a8cd5c845089185843
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/register-xlat.C
Log Message:
-----------
Fix comment for BND registers
Commit: f3d494b651e45ec437c9c8cad1503e549b6870a7
https://github.com/dyninst/dyninst/commit/f3d494b651e45ec437c9c8cad1503e549b6870a7
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_reg
Commit: 873fe24d88fab0551eb792310ed499f1b3f9a827
https://github.com/dyninst/dyninst/commit/873fe24d88fab0551eb792310ed499f1b3f9a827
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Refactor isCFT in decode_imm
Commit: 5782ef5f64b913b9870bfd614d284f722613ce2f
https://github.com/dyninst/dyninst/commit/5782ef5f64b913b9870bfd614d284f722613ce2f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed 64-bit values for immediates
Commit: e58fc2bec9e7d5bb926f31754621d18b9dc70581
https://github.com/dyninst/dyninst/commit/e58fc2bec9e7d5bb926f31754621d18b9dc70581
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Update comment for relative branch immediates
Commit: 4938e33e61265bd44478fdad3bea29a98938ec1e
https://github.com/dyninst/dyninst/commit/4938e33e61265bd44478fdad3bea29a98938ec1e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove error check on size_to_type
It has been updated to include all values used by Capstone.
Commit: 2296cb6bfdc8f0b7bfaf3d4740c7d372b3e2610e
https://github.com/dyninst/dyninst/commit/2296cb6bfdc8f0b7bfaf3d4740c7d372b3e2610e
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Remove unneeded assert
Commit: 299e693bcde64e675eefec81eed51b7f90200124
https://github.com/dyninst/dyninst/commit/299e693bcde64e675eefec81eed51b7f90200124
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move is_call and is_cft to where they are used
Commit: f39fef839eb61f26ec2064fc7a4caaea856f0ffb
https://github.com/dyninst/dyninst/commit/f39fef839eb61f26ec2064fc7a4caaea856f0ffb
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use signed values for calculations
The manual says everything but the scale can be positive or negative.
Commit: 1258b35bb7748931e05e411d7c422cd8caf9fe85
https://github.com/dyninst/dyninst/commit/1258b35bb7748931e05e411d7c422cd8caf9fe85
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Use braces
Commit: fdbdc97995a60a5b122a9ddd58c112fbb4cfa2f0
https://github.com/dyninst/dyninst/commit/fdbdc97995a60a5b122a9ddd58c112fbb4cfa2f0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Move size_to_type to where it is used
Commit: 41cec99d36b134c69248486e268b1670b8d1c02f
https://github.com/dyninst/dyninst/commit/41cec99d36b134c69248486e268b1670b8d1c02f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add some whitespace
Commit: 9151294fd494c90fff7a80bc0c915ab8a8a7c587
https://github.com/dyninst/dyninst/commit/9151294fd494c90fff7a80bc0c915ab8a8a7c587
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add description from Intel manual
Commit: c6955f2981a2b709aa7249dfcbce80767cff1b49
https://github.com/dyninst/dyninst/commit/c6955f2981a2b709aa7249dfcbce80767cff1b49
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Return early if processing a CFT
Commit: ede848ef4e3295e4a59c8e563bdad19b60457674
https://github.com/dyninst/dyninst/commit/ede848ef4e3295e4a59c8e563bdad19b60457674
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Add comment about LEA
Commit: 5fcf783a3a0c6e3666cee164fb35519ad520f89f
https://github.com/dyninst/dyninst/commit/5fcf783a3a0c6e3666cee164fb35519ad520f89f
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Rename immAST -> displacementAST
This better reflects its meaning.
Commit: b80f142fc2f262dc5478cb4e4ecd87fcaae39b52
https://github.com/dyninst/dyninst/commit/b80f142fc2f262dc5478cb4e4ecd87fcaae39b52
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Handle segment registers as memory operands
Commit: aaef4e5631b3ba139293d69516ffcf52ded8cd1a
https://github.com/dyninst/dyninst/commit/aaef4e5631b3ba139293d69516ffcf52ded8cd1a
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Fix cmake formatting in instructionAPI/CMakeLists.txt
Commit: e0106fa992bf916912814e985100d5df79ce4caa
https://github.com/dyninst/dyninst/commit/e0106fa992bf916912814e985100d5df79ce4caa
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M .github/workflows/dependency-version.yaml
M docker/dependencies.versions
Log Message:
-----------
Add dependency-version check for Capstone
Commit: 33701e89d9aedaa53f2b96b28578df2246fca02c
https://github.com/dyninst/dyninst/commit/33701e89d9aedaa53f2b96b28578df2246fca02c
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
Log Message:
-----------
Make Capstone a private dependency
Commit: 37bfad52570cae0335529228fb2ce7966727bec0
https://github.com/dyninst/dyninst/commit/37bfad52570cae0335529228fb2ce7966727bec0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A docker/build_capstone.sh
M docker/dependencies.versions
Log Message:
-----------
Docker: add Capstone builds
Commit: fdaa76f1558dd26a6770a49495142920143dcdd1
https://github.com/dyninst/dyninst/commit/fdaa76f1558dd26a6770a49495142920143dcdd1
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Only decode segment register operands for i386
Commit: 79bb23259b2254cf4f4bfafbc0705ca921161c37
https://github.com/dyninst/dyninst/commit/79bb23259b2254cf4f4bfafbc0705ca921161c37
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/x86/decoder.C
Log Message:
-----------
Fix format from clang's -Wformat-pedantic
Commit: 10be6c72a2691f59c6a86fbf553b9010149814b0
https://github.com/dyninst/dyninst/commit/10be6c72a2691f59c6a86fbf553b9010149814b0
Author: Tim Haines <thaines.astro@xxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M cmake/tpls/DyninstCapstone.cmake
Log Message:
-----------
Use correct capitalization for capstone_ROOT in CMake
Commit: 92cb0045bc540b0c4c2d2333a4133141b2aab7af
https://github.com/dyninst/dyninst/commit/92cb0045bc540b0c4c2d2333a4133141b2aab7af
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/h/Architecture.h
M dwarf/src/dwarfHandle.C
Log Message:
-----------
Add riscv architecture
Commit: 7032c21f4d08503ec044afb064deb7841153f883
https://github.com/dyninst/dyninst/commit/7032c21f4d08503ec044afb064deb7841153f883
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A instructionAPI/capstone/capstone.py
M instructionAPI/capstone/import.py
A instructionAPI/capstone/riscv64.py
Log Message:
-----------
Add riscv64 capstone parser
Commit: 18fa7d3edddfc6aacc13f2fae7830890b0bff3d5
https://github.com/dyninst/dyninst/commit/18fa7d3edddfc6aacc13f2fae7830890b0bff3d5
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/CMakeLists.txt
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/h/mnemonics/riscv64_entryIDs.h
A common/h/registers/riscv64_regs.h
A common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add RISC-V registers and mnemonics
Commit: 0a438d6b051a6ba0e5e5e29b06d18470941a337f
https://github.com/dyninst/dyninst/commit/0a438d6b051a6ba0e5e5e29b06d18470941a337f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M elf/src/Elf_X.C
M proccontrol/src/process.C
Log Message:
-----------
Add cases for Arch_riscv64 to suppress compiler warnings
Commit: 602040ad1da846f2ee22c13240185a04d09d3941
https://github.com/dyninst/dyninst/commit/602040ad1da846f2ee22c13240185a04d09d3941
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
M instructionAPI/capstone/import.py
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/ArchSpecificFormatters.C
A instructionAPI/src/InstructionDecoder-Capstone.C
A instructionAPI/src/InstructionDecoder-Capstone.h
A instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/InstructionDecoderImpl.C
Log Message:
-----------
Add Capstone-based RISC-V InstructionAPI
Commit: 5ecdd02a0616eeb904046d8d9ae0e17987bccd87
https://github.com/dyninst/dyninst/commit/5ecdd02a0616eeb904046d8d9ae0e17987bccd87
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M parseAPI/CMakeLists.txt
M parseAPI/src/CodeSource.C
M parseAPI/src/IA_IAPI.C
A parseAPI/src/IA_riscv64.C
A parseAPI/src/IA_riscv64.h
M parseAPI/src/SymbolicExpression.C
Log Message:
-----------
Add RISC-V ParseAPI
Commit: d8ee6a64d2a337cf1a51d32d9d6e9a6be98319a1
https://github.com/dyninst/dyninst/commit/d8ee6a64d2a337cf1a51d32d9d6e9a6be98319a1
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A dataflowAPI/rose/SgAsmRiscv64Instruction.h
M dataflowAPI/rose/conversions.h
A dataflowAPI/rose/semantics/DispatcherRiscv64.C
A dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/Registers.h
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/RoseImpl.C
M dataflowAPI/src/RoseInsnFactory.C
M dataflowAPI/src/RoseInsnFactory.h
M dataflowAPI/src/SymEval.C
M dataflowAPI/src/SymbolicExpansion.C
M dataflowAPI/src/SymbolicExpansion.h
M dataflowAPI/src/convertOpcodes.C
A external/rose/riscv64InstructionEnum.h
M external/rose/rose-compat.h
Log Message:
-----------
Implement RISC-V DataflowAPI base code
Commit: 87925598a877a02b765b34430df4930a6a392a2c
https://github.com/dyninst/dyninst/commit/87925598a877a02b765b34430df4930a6a392a2c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A dataflowAPI/sail/riscv_sail_to_rose.pl
A dataflowAPI/sail/sail_ast.pl
A dataflowAPI/sail/sail_lex.pl
A dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add sail lexical parser
Commit: d60201fac18a7e7b89397c26a185704b56386498
https://github.com/dyninst/dyninst/commit/d60201fac18a7e7b89397c26a185704b56386498
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
rewrite sail lexer using regex
Commit: f45d4baea4c161f04525cc4663728f69564827e9
https://github.com/dyninst/dyninst/commit/f45d4baea4c161f04525cc4663728f69564827e9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/sail/sail_lex.pl
Log Message:
-----------
Use array instead of hash
Commit: 2772d6e368ceef617e589b1b04801c706329f4d4
https://github.com/dyninst/dyninst/commit/2772d6e368ceef617e589b1b04801c706329f4d4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/sail/sail_syntax.pl
Log Message:
-----------
Add most syntax
Commit: 72618f3d5dffa384382b7274ef901e99d1debf61
https://github.com/dyninst/dyninst/commit/72618f3d5dffa384382b7274ef901e99d1debf61
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A dataflowAPI/sail/riscv_ast.json
R dataflowAPI/sail/riscv_sail_to_rose.pl
R dataflowAPI/sail/sail_ast.pl
R dataflowAPI/sail/sail_lex.pl
R dataflowAPI/sail/sail_syntax.pl
A dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (UTYPE)
Commit: d7abed0e8345a6a6e8505fe6007749e2a623ead2
https://github.com/dyninst/dyninst/commit/d7abed0e8345a6a6e8505fe6007749e2a623ead2
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/h/Architecture.h
Log Message:
-----------
Add missing riscv64 address width
Commit: 61a1644aabed8a6b9a03fb73162c9f4ae706f859
https://github.com/dyninst/dyninst/commit/61a1644aabed8a6b9a03fb73162c9f4ae706f859
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Add sail to rose converter (IMAC subsets)
Commit: 8bc84713e62fc7f3fec39cfb8643e5306f84761f
https://github.com/dyninst/dyninst/commit/8bc84713e62fc7f3fec39cfb8643e5306f84761f
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/DispatcherRiscv64.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Integrate riscv64 ROSE code into dataflowAPI
Commit: d17ae0681ccdb74744c1cab1bd1580a155dd3e46
https://github.com/dyninst/dyninst/commit/d17ae0681ccdb74744c1cab1bd1580a155dd3e46
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/CMakeLists.txt
R instructionAPI/src/x86/decoder.C
R instructionAPI/src/x86/decoder.h
R instructionAPI/src/x86/mnemonic-xlat.C
R instructionAPI/src/x86/mnemonic-xlat.h
R instructionAPI/src/x86/register-xlat.C
R instructionAPI/src/x86/register-xlat.h
Log Message:
-----------
migrate instructionAPI to capstone
Commit: cb8a111b486f95f4a541738382db98860b704c67
https://github.com/dyninst/dyninst/commit/cb8a111b486f95f4a541738382db98860b704c67
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/rose/semantics/BaseSemantics2.h
A dataflowAPI/rose/semantics/ConcreteSemantics2.C
A dataflowAPI/rose/semantics/ConcreteSemantics2.h
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/rose/semantics/SymEvalSemantics.h
M dataflowAPI/src/SymEvalPolicy.h
Log Message:
-----------
fix mulhsu instruction semantic
Commit: 9556084e86c62d5debf8bbccc1f0bfb09133e229
https://github.com/dyninst/dyninst/commit/9556084e86c62d5debf8bbccc1f0bfb09133e229
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M cmake/DyninstPlatform.cmake
M cmake/tpls/DyninstCapstone.cmake
M common/CMakeLists.txt
A common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M common/src/arch.h
M common/src/util.C
M dataflowAPI/src/ABI.C
M dataflowAPI/src/RegisterMap.C
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
A dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget.h
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
A dyninstAPI/src/codegen-riscv64.C
A dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.h
A dyninstAPI/src/emit-riscv64.C
A dyninstAPI/src/emit-riscv64.h
A dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/inst-riscv64.h
M dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/mapped_object.C
A dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI/src/unix.C
M dyninstAPI_RT/CMakeLists.txt
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/CMakeLists.txt
M proccontrol/src/linux.C
M proccontrol/src/linux.h
A proccontrol/src/loadLibrary/codegen-riscv64.C
M proccontrol/src/loadLibrary/codegen.C
M proccontrol/src/loadLibrary/codegen.h
A proccontrol/src/riscv_process.C
A proccontrol/src/riscv_process.h
Log Message:
-----------
Add RISC-V guards
Commit: c9adcd0e9c4bd293b0e76096951a34ec14bced0c
https://github.com/dyninst/dyninst/commit/c9adcd0e9c4bd293b0e76096951a34ec14bced0c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/binaryEdit.C
M dyninstAPI/src/codegen.C
M dyninstAPI/src/function.h
M dyninstAPI/src/linux.C
M stackwalk/CMakeLists.txt
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/framestepper.C
A stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/linux-swk.C
A stackwalk/src/riscv64-swk.C
A stackwalk/src/riscv64-swk.h
M symtabAPI/CMakeLists.txt
M symtabAPI/src/emitElfStatic.C
Log Message:
-----------
Add RISC-V stackwalk guard
Commit: 4603ee42ac7c718bed933e84e72019a6d214d5e7
https://github.com/dyninst/dyninst/commit/4603ee42ac7c718bed933e84e72019a6d214d5e7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A dyninstAPI_RT/src/RTthread-riscv64.c
Log Message:
-----------
Add missing RTthread-riscv64.c
Commit: 73ba833953e536e4f54d95db98801ef950658d19
https://github.com/dyninst/dyninst/commit/73ba833953e536e4f54d95db98801ef950658d19
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A symtabAPI/src/emitElfStatic-riscv64.C
A symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Create RISC-V emitter template
Commit: 435cbcae221ca3da6205ca8261eaef3d09dcbc5e
https://github.com/dyninst/dyninst/commit/435cbcae221ca3da6205ca8261eaef3d09dcbc5e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
A dyninstAPI_RT/src/RTstatic_ctors_dtors-riscv64.c
Log Message:
-----------
Add missing RTstatic_ctors_dtors-riscv64.c
Commit: bde98868f8f13cb0c3dca7985979af13deb87ac9
https://github.com/dyninst/dyninst/commit/bde98868f8f13cb0c3dca7985979af13deb87ac9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M common/src/arch.h
M dataflowAPI/src/RegisterMap.h
M dyninstAPI/CMakeLists.txt
M dyninstAPI/src/RegisterConversion-riscv64.C
A dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
A dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/inst-riscv64.C
A dyninstAPI/src/linux-riscv64.C
A dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI/src/registerSpace.h
A dyninstAPI/src/stackwalk-riscv64.C
M dyninstAPI/src/unix.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/dbginfo-stepper.C
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/src/emitElfStatic-stub.C
Log Message:
-----------
Make RISC-V dyninst compile on a RISC-V machine
Commit: 5a6b0d55bc88bb6cbc8ce8f915e13149030a7b69
https://github.com/dyninst/dyninst/commit/5a6b0d55bc88bb6cbc8ce8f915e13149030a7b69
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
M dyninstAPI/src/linux-riscv64.C
M dyninstAPI/src/parse-riscv64.C
Log Message:
-----------
Implement some instruction emission functions
Commit: 0d0cafc54af328a35d6ec43181178e19346214c4
https://github.com/dyninst/dyninst/commit/0d0cafc54af328a35d6ec43181178e19346214c4
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M dataflowAPI/rose/semantics/Registers.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/registerSpace.h
M external/rose/riscv64InstructionEnum.h
Log Message:
-----------
Amalgamate 32 and 64 bit fpr
Commit: 483b8b13f031db4c0768fac12bcb6a76d9901a1a
https://github.com/dyninst/dyninst/commit/483b8b13f031db4c0768fac12bcb6a76d9901a1a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Add emitImm
Commit: 9331620180bd37543ef0f1e6ee220fef3b46fc2e
https://github.com/dyninst/dyninst/commit/9331620180bd37543ef0f1e6ee220fef3b46fc2e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch.h
M dataflowAPI/src/ABI.C
M dyninstAPI/src/BPatch_memoryAccessAdapter.C
M dyninstAPI/src/BPatch_snippet.C
M dyninstAPI/src/arch-forward-decl.h
M dyninstAPI/src/ast.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/legacy-instruction.h
M dyninstAPI/src/linux-riscv64.h
M dyninstAPI/src/linux.h
M dyninstAPI/src/registerSpace.C
M dyninstAPI/src/registerSpace.h
M dyninstAPI_RT/src/RTlinux.c
M proccontrol/src/linux.C
M stackwalk/src/dbginfo-stepper.C
Log Message:
-----------
Rename arch_riscv64 to DYNINST_HOST_ARCH_AARCH64
Commit: dae5228555ad8796ab29d4a569c2ab0299685b1b
https://github.com/dyninst/dyninst/commit/dae5228555ad8796ab29d4a569c2ab0299685b1b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/CMakeLists.txt
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/convert.C
A dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/convertOpcodes.C
M dwarf/CMakeLists.txt
M dwarf/src/registers/convert.C
A dwarf/src/registers/riscv64.h
M dyninstAPI/src/inst-riscv64.h
M external/rose/riscv64InstructionEnum.h
M parseAPI/CMakeLists.txt
Log Message:
-----------
Add missing RISC-V ROSE register conversion
Commit: 3bdcc9b346c074c177562496ba6694cdb16ffbb7
https://github.com/dyninst/dyninst/commit/3bdcc9b346c074c177562496ba6694cdb16ffbb7
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M instructionAPI/src/Instruction.C
Log Message:
-----------
Add missing invalid operand check
Commit: b4e4b7aa61404e12afe1279748129b59698a11d9
https://github.com/dyninst/dyninst/commit/b4e4b7aa61404e12afe1279748129b59698a11d9
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-aarch64.C
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dataflowAPI/CMakeLists.txt
M dataflowAPI/rose/registers/riscv64.h
M dataflowAPI/src/RoseInsnFactory.h
M dyninstAPI/src/Parsing.h
M dyninstAPI/src/mapped_object.C
M instructionAPI/h/Instruction.h
M instructionAPI/src/InstructionDecoder-Capstone.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoder-riscv64.C
M instructionAPI/src/interrupts.C
M instructionAPI/src/syscalls.C
M parseAPI/CMakeLists.txt
M parseAPI/src/IA_riscv64.C
M stackwalk/CMakeLists.txt
M stackwalk/src/linux-riscv64-swk.C
M stackwalk/src/riscv64-swk.C
M symtabAPI/CMakeLists.txt
Log Message:
-----------
Modify RISC-V Capstone instruction decoder
Commit: b9c210f635a6267dccd461427dcaccc75d293c4a
https://github.com/dyninst/dyninst/commit/b9c210f635a6267dccd461427dcaccc75d293c4a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add C-Type Emitter
Commit: 516907f21bd3e5885e8a40f173d002c8e5daaf2c
https://github.com/dyninst/dyninst/commit/516907f21bd3e5885e8a40f173d002c8e5daaf2c
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add Load Immediate
Commit: 0ed982b013b750c03504de9e392a1c97e0cce72b
https://github.com/dyninst/dyninst/commit/0ed982b013b750c03504de9e392a1c97e0cce72b
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Change insn_size to is_compressed
Commit: 9f5b4b16219ebbb7f6c751a998f1f77715f1abdb
https://github.com/dyninst/dyninst/commit/9f5b4b16219ebbb7f6c751a998f1f77715f1abdb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add addi codegen
Commit: ebb7e63fcf36dfdab75b1dbc20b16a2349d5e790
https://github.com/dyninst/dyninst/commit/ebb7e63fcf36dfdab75b1dbc20b16a2349d5e790
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Optimize addi Code Generation
Commit: 96b3f28d8164b8ded6dbee7e60fb948da2b5e497
https://github.com/dyninst/dyninst/commit/96b3f28d8164b8ded6dbee7e60fb948da2b5e497
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M cmake/DyninstCapArchDef.cmake
M dyninstAPI/CMakeLists.txt
M dyninstAPI_RT/CMakeLists.txt
Log Message:
-----------
Fix DYNINST_ARCH_riscv64
Commit: 760855ed577ca11537cf8be602585f951f32544a
https://github.com/dyninst/dyninst/commit/760855ed577ca11537cf8be602585f951f32544a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dataflowAPI/src/ABI.C
Log Message:
-----------
Add RISC-V initialize64
Commit: d2c7d6b6d6e9cc948745947071f96dc44fc030d6
https://github.com/dyninst/dyninst/commit/d2c7d6b6d6e9cc948745947071f96dc44fc030d6
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/h/registers/riscv64_regs.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Parsing-arch.C
M dyninstAPI/src/RegisterConversion-riscv64.C
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-aarch64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/parse-cfg.h
M dyninstAPI/src/parse-riscv64.C
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/CMakeLists.txt
M symtabAPI/src/relocationEntry-elf-riscv64.C
Log Message:
-----------
Rebase and fix code generation
Commit: acb06c648dc0a48d81c4012d12b4428545b7fffb
https://github.com/dyninst/dyninst/commit/acb06c648dc0a48d81c4012d12b4428545b7fffb
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V jump instruction generation
Commit: a256ff448bca8afd12b9a1f76a828516b0d7337a
https://github.com/dyninst/dyninst/commit/a256ff448bca8afd12b9a1f76a828516b0d7337a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI_RT/src/RTlinux.c
M stackwalk/src/linux-riscv64-swk.C
Log Message:
-----------
Change gregs to __gregs
Commit: bb16c4c61ea477b70586feb9a1d303f96367d00e
https://github.com/dyninst/dyninst/commit/bb16c4c61ea477b70586feb9a1d303f96367d00e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Add RISC-V Long Branch
Commit: e5e737b4a1643706342286102fee70aa4e57ed17
https://github.com/dyninst/dyninst/commit/e5e737b4a1643706342286102fee70aa4e57ed17
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite shifts and constants in RISC-V codegen
Commit: 4a12372b3d5f7b929f255696e0a939eff310a51a
https://github.com/dyninst/dyninst/commit/4a12372b3d5f7b929f255696e0a939eff310a51a
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix wrong indexing order in INSN_SET
Commit: 273b0a4b7260716a4e6d64b927756d89d19003b8
https://github.com/dyninst/dyninst/commit/273b0a4b7260716a4e6d64b927756d89d19003b8
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Rewrite load and store using I-Type and S-Type generator
Commit: 25c1b9d2b3683387a7f353d104645e1f74d0cf41
https://github.com/dyninst/dyninst/commit/25c1b9d2b3683387a7f353d104645e1f74d0cf41
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2025-02-03 (Mon, 03 Feb 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/emit-riscv64.C
Log Message:
-----------
Finish emit basic operators
Compare: https://github.com/dyninst/dyninst/compare/dba9ebb40419...25c1b9d2b368
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