[DynInst_API:] [dyninst/dyninst] 9cb674: Fix PC conversion

[Tim Haines <noreply@xxxxxxxxxx>]

  Branch: refs/heads/thaines/roseregs_fix_aarch64
  Home:   https://github.com/dyninst/dyninst
  Commit: 9cb674cc4166426048e7ca4ba2a4f21473c17069
      https://github.com/dyninst/dyninst/commit/9cb674cc4166426048e7ca4ba2a4f21473c17069
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h
    M dataflowAPI/rose/registers/convert.C

  Log Message:
  -----------
  Fix PC conversion

This handles both the 32-bit and 64-bit SP representations.


  Commit: fc6344d989a9b880d4801d35d448de20b3be8403
      https://github.com/dyninst/dyninst/commit/fc6344d989a9b880d4801d35d448de20b3be8403
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h
    M dataflowAPI/rose/registers/convert.C

  Log Message:
  -----------
  Update conversion of zero register

This makes it more uniform and removes the hacky bit-twiddling of the
MachRegister by name.


  Commit: 39a64c2d7d3d4687f79fc8b5751a42210c8a604b
      https://github.com/dyninst/dyninst/commit/39a64c2d7d3d4687f79fc8b5751a42210c8a604b
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h
    M dataflowAPI/rose/registers/convert.C

  Log Message:
  -----------
  Update conversion of stack pointer

This makes it more uniform and removes the hacky bit-twiddling of the
MachRegister by name.


  Commit: 7bd6bdc4c162a370c22af94f26ce194b8c3c5326
      https://github.com/dyninst/dyninst/commit/7bd6bdc4c162a370c22af94f26ce194b8c3c5326
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h
    M dataflowAPI/rose/registers/convert.C

  Log Message:
  -----------
  Update conversion of pstate register

This makes it more uniform and removes the hacky bit-twiddling of the
MachRegister by name.


  Commit: e9ada79147e8f9c497c25b73a213735053c37b05
      https://github.com/dyninst/dyninst/commit/e9ada79147e8f9c497c25b73a213735053c37b05
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h

  Log Message:
  -----------
  Update conversion of GPRs

The register IDs are not guaranteed to be sequential, so it's not
possible to do arithmetic on them.


  Commit: 5e98108b0663ba3ba15f4db24e3252b93003385c
      https://github.com/dyninst/dyninst/commit/5e98108b0663ba3ba15f4db24e3252b93003385c
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h

  Log Message:
  -----------
  Update conversion of FPRs

The register IDs are not guaranteed to be sequential, so it's not
possible to do arithmetic on them.


  Commit: 73ba2c82e9e6631786b189e0515426dab26dd5b6
      https://github.com/dyninst/dyninst/commit/73ba2c82e9e6631786b189e0515426dab26dd5b6
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M dataflowAPI/rose/registers/aarch64.h

  Log Message:
  -----------
  Update conversion of pstate flags

This makes it uniform with the other conversions. Note: the complete
pstate register is treated separately from its individual fields in
ROSE.


Compare: https://github.com/dyninst/dyninst/compare/0d6ac541064e...73ba2c82e9e6

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