[DynInst_API:] [dyninst/dyninst] effe9b: Import and update ppc64le opcodes from Capstone (#...

[Tim Haines <noreply@xxxxxxxxxx>]

  Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: effe9b22f88d984203821c6c0b3be43f7c0455c1
      https://github.com/dyninst/dyninst/commit/effe9b22f88d984203821c6c0b3be43f7c0455c1
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-28 (Mon, 28 Oct 2024)

  Changed paths:
    M common/h/mnemonics/ppc_entryIDs.h
    M common/src/arch-power.h
    M dataflowAPI/src/RoseInsnFactory.C
    M dataflowAPI/src/convertOpcodes.C
    M dyninstAPI/src/BPatch_memoryAccessAdapter.C
    M dyninstAPI/src/inst-power.C
    M instructionAPI/capstone/import_mnemonics.py
    A instructionAPI/capstone/mnemonics.ppc
    A instructionAPI/capstone/ppc/README.md
    M instructionAPI/capstone/ppc/mnemonics.py
    R instructionAPI/ppc_manual_parser.pl
    M instructionAPI/src/InstructionDecoder-power.C
    M instructionAPI/src/power_opcode_tables.C

  Log Message:
  -----------
  Import and update ppc64le opcodes from Capstone (#1803)

* Remove mnemonics deleted before Power ISA 2.01

These have no reprentation in Capstone because they removed from the
architecture before version 2.01 of the IBM PowerPC ISA.

PowerPC User Instruction Set Architecture
Book I
Version 2.01
September 2003
E.30 Deleted Instructions

* Rename <name>_rc -> <name>

The first form is really internal to Rose. The form without a suffix
is the official mnemonic.

* Remove fx* mnemonics

These are not present in any ISA doc since at least v2.01 (2003).

* Add floating point merge instructions missing from Capstone

These come from Chapter 4 Floating-Point Facility of v3.01 of the ISA.
Capstone doesn't have them because they aren't in LLVM.

* Add external control instructions missing from Capstone

These come from Chapter 5 External Control of v2.0 of the ISA manual.
These aren't in Capstone because they are missing from LLVM.

* Remove unknown fsmr, fsmtp, fsmfp

These aren't in any ISA manual after 2.0. I'm assuming they are old
POWER instructions.

* Mark l{st}fdpx as missing in Capstone

They are part of the Floating Point Facility (Chapter 4, v3.1)
introduced by v2.05, but have since been phased out.

Other members of the family are lfdp, stfdp, and stfdpx. They have no
entries in Dyninst or Capstone.

* Remove unknown floating-point load/store instructions

These aren't in any ISA manual after 2.0. I'm assuming they are old
POWER instructions.

* Mark 'Move to CR from XER X-form' (mcrxr) as missing

The extended for mcrxrx is in Capstone.

* Mark Processor Control Instructions as missing from Capstone

There are a few more forms of this added in v3.1 for Ultravisor
support.

* Mark 'Fixed-Point Logical Instructions' as missing from Capstone

Capstone supports the vector versions.

* Make aliases for QVX extensions (qvfX -> qvX)

Capstone has complete support for the QVX extension.

* Mark 'Segment Lookaside Buffer' slbiag as missing in Capstone

Capstone has the non-global version slbia.

* Remove unknown vector store instruction stvb16x

The corresponding mnemonics are of the for stveb*. This was never
implemented in Dyninst, so I'm deleting it.

* Make aliases for VSX instructions svcs, xscvhphp

These are not the correct spellings even though the string
representations in the opcode tables are.

* Remove floating-point quad instructions deleted in v2.01 (2003)

* Mark phased-out 'Fixed-Point Move Assist' as missing in Capstone

3.3.7 Fixed-Point Move Assist Instructions from v3.1B (Sept2021)

* Remove unknown Fixed-Point Move Assist Instruction (stswx)

It's not part of 3.3.6 Fixed-Point Move Assist Instructions in v2.01
that has stswi, nor any other ISA version.



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