[DynInst_API:] [dyninst/dyninst] c9ccbb: Import and update Aarch64 registers from Capstone ...

[Tim Haines <noreply@xxxxxxxxxx>]

  Branch: refs/heads/master
  Home:   https://github.com/dyninst/dyninst
  Commit: c9ccbb8e255a4d1955d6951ca88313589aa1db03
      https://github.com/dyninst/dyninst/commit/c9ccbb8e255a4d1955d6951ca88313589aa1db03
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-17 (Thu, 17 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h
    M common/h/registers/reg_def.h
    M common/src/registers/MachRegister.C
    R instructionAPI/aarch64_manual_parser.py
    R instructionAPI/aarch64_pseudocode_extractor.py
    R instructionAPI/aarch64_sysreg_builder.py
    A instructionAPI/capstone/README.md
    A instructionAPI/capstone/aarch64/README.md
    A instructionAPI/capstone/aarch64/dwarf.py
    M instructionAPI/capstone/aarch64/registers.py
    A instructionAPI/capstone/aarch64/sysregs.py
    A instructionAPI/capstone/import_registers.py
    M instructionAPI/src/aarch64_opcode_tables.C

  Log Message:
  -----------
  Import and update Aarch64 registers from Capstone (#1795)

* Remove Generic Interrupt Controller registers

Capstone has partial support for the Generic Interrupt Controller
Architecture Specification registers. However, these are for embedded
systems only. To reduce the number of registers in Dyninst, we ignore
them for now.

* Move constant format note

This makes it consistent with the other <arch>_regs.h files

* Fix value of IMPLEMENTATION_DEFINED_SYSREG

It's value can't be bigger than 255 since it has to fit in a single
byte.

* Mark hq* as pseudo-registers

They are only used in instruction decoding and will go away once we
use Capstone.

* Update special purpose registers (SPRs)

Capstone doesn't have a separate representations for the nzcv bits
of the pstate flag.

* Mark fpsr as a system register

It's treated that way in the Architecture Reference Manual and in
Capstone.



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