[DynInst_API:] [dyninst/dyninst] dd107f: Replace old importer scripts

[Tim Haines <noreply@xxxxxxxxxx>]

  Branch: refs/heads/thaines/update_arm_registers
  Home:   https://github.com/dyninst/dyninst
  Commit: dd107fd67ce1096f405945394a3abf35e701e488
      https://github.com/dyninst/dyninst/commit/dd107fd67ce1096f405945394a3abf35e701e488
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    R instructionAPI/aarch64_sysreg_builder.py
    A instructionAPI/capstone/README.md
    A instructionAPI/capstone/aarch64/README.md
    A instructionAPI/capstone/aarch64/dwarf.py
    M instructionAPI/capstone/aarch64/registers.py
    A instructionAPI/capstone/aarch64/sysregs.py
    A instructionAPI/capstone/import_registers.py

  Log Message:
  -----------
  Replace old importer scripts

The new ones are based on Capstone v5.


  Commit: b9f1ae3b00f76088031524e901d86f00381378e8
      https://github.com/dyninst/dyninst/commit/b9f1ae3b00f76088031524e901d86f00381378e8
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Remove trailing namespace comment


  Commit: d32ba57bed5169d3046445437c0e2ee44c1862b5
      https://github.com/dyninst/dyninst/commit/d32ba57bed5169d3046445437c0e2ee44c1862b5
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h
    M instructionAPI/src/aarch64_opcode_tables.C

  Log Message:
  -----------
  Remove Generic Interrupt Controller registers

Capstone has partial support for the Generic Interrupt Controller
Architecture Specification registers. However, these are for embedded
systems only. To reduce the number of registers in Dyninst, we ignore
them for now.


  Commit: 6c1a5900eb616c24c9db4186c33414ce6fced11c
      https://github.com/dyninst/dyninst/commit/6c1a5900eb616c24c9db4186c33414ce6fced11c
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Move constant format note

This makes it consistent with the other <arch>_regs.h files


  Commit: ce1330bd0ee448e7a90180a09da8d21f61b11e49
      https://github.com/dyninst/dyninst/commit/ce1330bd0ee448e7a90180a09da8d21f61b11e49
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Fix value of IMPLEMENTATION_DEFINED_SYSREG

It's value can't be bigger than 255 since it has to fit in a single
byte.


  Commit: f8033f12cdec2d66bb232228854d059c42c5347d
      https://github.com/dyninst/dyninst/commit/f8033f12cdec2d66bb232228854d059c42c5347d
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark IMPLEMENTATION_DEFINED_SYSREG as a pseudo-register


  Commit: 4fd59c93d5ba0b17b12ba47cb100be2ceff8edde
      https://github.com/dyninst/dyninst/commit/4fd59c93d5ba0b17b12ba47cb100be2ceff8edde
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark hq* as pseudo-registers

They are only used in instruction decoding and will go away once we
use Capstone.


  Commit: ee57c5e976956217da9851fec769ef931c434dcf
      https://github.com/dyninst/dyninst/commit/ee57c5e976956217da9851fec769ef931c434dcf
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Add reference for register sizes


  Commit: 5b1f3a5bf115b1ce07fb032aad42abf6acc6c9a3
      https://github.com/dyninst/dyninst/commit/5b1f3a5bf115b1ce07fb032aad42abf6acc6c9a3
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Remove unused FSR category


  Commit: efbb7736aff901bf1422acf9c846de584a72fc45
      https://github.com/dyninst/dyninst/commit/efbb7736aff901bf1422acf9c846de584a72fc45
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Update base register categories


  Commit: 8ed4a45b532bb803525013466d8f603ade7e8548
      https://github.com/dyninst/dyninst/commit/8ed4a45b532bb803525013466d8f603ade7e8548
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark tlbi registers as pseudo-registers


  Commit: b221bbba1409b2d5d772c9ce95d154478c5e593b
      https://github.com/dyninst/dyninst/commit/b221bbba1409b2d5d772c9ce95d154478c5e593b
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark instruction cache registers as pseudo-registers


  Commit: 0827d04959ae8f118ec0c3e6d19294bdd2b302aa
      https://github.com/dyninst/dyninst/commit/0827d04959ae8f118ec0c3e6d19294bdd2b302aa
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark address translation registers as pseudo-registers


  Commit: 9e08d9f139901fa0071470dee619876af0c1cc01
      https://github.com/dyninst/dyninst/commit/9e08d9f139901fa0071470dee619876af0c1cc01
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark data cache invalidation registers as pseudo-registers


  Commit: 86b3a2027eeb2f919fcd3202c5e7b627f7cace42
      https://github.com/dyninst/dyninst/commit/86b3a2027eeb2f919fcd3202c5e7b627f7cace42
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Update special purpose registers (SPRs)

Capstone doesn't have a separate representations for the nzcv bits
of the pstate flag.


  Commit: 4d27ab0979c7c7b9f54d1046139b30d9ef0afc31
      https://github.com/dyninst/dyninst/commit/4d27ab0979c7c7b9f54d1046139b30d9ef0afc31
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Mark fpsr as a system register

It's treated that way in the Architecture Reference Manual and in
Capstone.


  Commit: cb28e8a37810b28c1aa64bafaa953576cee92216
      https://github.com/dyninst/dyninst/commit/cb28e8a37810b28c1aa64bafaa953576cee92216
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Update GPRs


  Commit: 4a62613ecb4fb06444b7be9e082349ca09add530
      https://github.com/dyninst/dyninst/commit/4a62613ecb4fb06444b7be9e082349ca09add530
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Update FPRs


  Commit: 030d715ba53e53d2b8c266a5d720ed7e227126df
      https://github.com/dyninst/dyninst/commit/030d715ba53e53d2b8c266a5d720ed7e227126df
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Add SVE/SVE2


  Commit: 74c9bf1baa19f1037059881ba4f20692aeb4c97a
      https://github.com/dyninst/dyninst/commit/74c9bf1baa19f1037059881ba4f20692aeb4c97a
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h

  Log Message:
  -----------
  Add SME


  Commit: cc7aead96552e4bdd3ce8e0ac9fe49eca909fcf0
      https://github.com/dyninst/dyninst/commit/cc7aead96552e4bdd3ce8e0ac9fe49eca909fcf0
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h
    M common/h/registers/reg_def.h

  Log Message:
  -----------
  Add aliases for fp, lr, x16, and x17


  Commit: 8884f3ce459943ef5f98b51745142b5acbae1b67
      https://github.com/dyninst/dyninst/commit/8884f3ce459943ef5f98b51745142b5acbae1b67
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-10 (Thu, 10 Oct 2024)

  Changed paths:
    M common/src/registers/MachRegister.C

  Log Message:
  -----------
  Add DWARF mappings


  Commit: e91f4056c49983d400d298a7f00a992d793053b9
      https://github.com/dyninst/dyninst/commit/e91f4056c49983d400d298a7f00a992d793053b9
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-10 (Thu, 10 Oct 2024)

  Changed paths:
    M instructionAPI/capstone/aarch64/README.md

  Log Message:
  -----------
  Add excluded sysreg categories to README


  Commit: 69e9a03c9f086bede8fe41ddbf83c84b13d3c907
      https://github.com/dyninst/dyninst/commit/69e9a03c9f086bede8fe41ddbf83c84b13d3c907
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-11 (Fri, 11 Oct 2024)

  Changed paths:
    M common/h/registers/aarch64_regs.h
    M instructionAPI/capstone/import_registers.py

  Log Message:
  -----------
  Add system registers


  Commit: 3548d6e5b0b32dbe8a0253dd077238d25f172a26
      https://github.com/dyninst/dyninst/commit/3548d6e5b0b32dbe8a0253dd077238d25f172a26
  Author: Tim Haines <thaines.astro@xxxxxxxxx>
  Date:   2024-10-11 (Fri, 11 Oct 2024)

  Changed paths:
    M common/src/registers/MachRegister.C

  Log Message:
  -----------
  Add new vector extensions to MachRegister::size()


Compare: https://github.com/dyninst/dyninst/compare/dd107fd67ce1%5E...3548d6e5b0b3

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