Branch: refs/heads/angushe/riscv-capstone
Home: https://github.com/dyninst/dyninst
Commit: 024b847dd37d32c0516bed11b2cf3e25ae70a824
https://github.com/dyninst/dyninst/commit/024b847dd37d32c0516bed11b2cf3e25ae70a824
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2024-06-22 (Sat, 22 Jun 2024)
Changed paths:
M instructionAPI/src/InstructionDecoder-Capstone.C
Log Message:
-----------
set capstone mode to CS_MODE_RISCVC
Commit: 21c15a451f3d6405c73c3843e8a5d09d13e2b29e
https://github.com/dyninst/dyninst/commit/21c15a451f3d6405c73c3843e8a5d09d13e2b29e
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2024-07-02 (Tue, 02 Jul 2024)
Changed paths:
M instructionAPI/src/InstructionDecoder-Capstone-riscv64.C
Log Message:
-----------
access support added for RISC-V in capstone
see https://github.com/capstone-engine/capstone/pull/2393
Commit: b0c3d0bbf22adad223b4be830b617b3dd9213222
https://github.com/dyninst/dyninst/commit/b0c3d0bbf22adad223b4be830b617b3dd9213222
Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
Date: 2024-07-02 (Tue, 02 Jul 2024)
Changed paths:
M common/h/dyn_regs.h
M common/h/entryIDs.h
M common/src/dyn_regs.C
M instructionAPI/CMakeLists.txt
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/InstructionCategories.C
A instructionAPI/src/InstructionDecoder-Capstone-riscv32.C
M instructionAPI/src/InstructionDecoder-Capstone.C
M instructionAPI/src/InstructionDecoder-Capstone.h
M instructionAPI/src/InstructionDecoderImpl.C
Log Message:
-----------
RISCV32 support
Compare: https://github.com/dyninst/dyninst/compare/3cc63d8eea78...b0c3d0bbf22a
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