[DynInst_API:] [dyninst/dyninst] 17f8c7: make the compilation work


Date: Sun, 02 Jun 2024 22:00:49 -0700
From: wxrdnx <noreply@xxxxxxxxxx>
Subject: [DynInst_API:] [dyninst/dyninst] 17f8c7: make the compilation work
  Branch: refs/heads/angushe/riscv-capstone
  Home:   https://github.com/dyninst/dyninst
  Commit: 17f8c750be1a5ea067e4d15cd589181ca3f1c526
      https://github.com/dyninst/dyninst/commit/17f8c750be1a5ea067e4d15cd589181ca3f1c526
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-02 (Sun, 02 Jun 2024)

  Changed paths:
    M dataflowAPI/src/AbslocInterface.C
    M instructionAPI/src/InstructionDecoder-aarch64.h
    M instructionAPI/src/InstructionDecoder-amdgpu-vega.h

  Log Message:
  -----------
  make the compilation work


  Commit: c83d64482574d8592d4f9f7692f5488280ae4ece
      https://github.com/dyninst/dyninst/commit/c83d64482574d8592d4f9f7692f5488280ae4ece
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-02 (Sun, 02 Jun 2024)

  Changed paths:
    M common/h/dyn_regs.h
    M dwarf/src/dwarfHandle.C

  Log Message:
  -----------
  Add riscv architecture, add riscv support in dwarf/src/dwarfHandle.C


  Commit: 6af5713ddfadd0275588b31393dc170a4290df66
      https://github.com/dyninst/dyninst/commit/6af5713ddfadd0275588b31393dc170a4290df66
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-02 (Sun, 02 Jun 2024)

  Changed paths:
    M instructionAPI/capstone-interation.py

  Log Message:
  -----------
  python3 compatible


  Commit: f6766441d7375a3de5d3f8ebdc4771f5a7f6ac9c
      https://github.com/dyninst/dyninst/commit/f6766441d7375a3de5d3f8ebdc4771f5a7f6ac9c
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-02 (Sun, 02 Jun 2024)

  Changed paths:
    M common/h/dyn_regs.h

  Log Message:
  -----------
  add riscv64 registers


  Commit: d04b6ba97a0b1b5ed63c48c029301624d3f47959
      https://github.com/dyninst/dyninst/commit/d04b6ba97a0b1b5ed63c48c029301624d3f47959
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-02 (Sun, 02 Jun 2024)

  Changed paths:
    M common/h/entryIDs.h

  Log Message:
  -----------
  add riscv64 opcode IDs


  Commit: d04a454175b5b64551a86ed1dc31c3fb3cc81938
      https://github.com/dyninst/dyninst/commit/d04a454175b5b64551a86ed1dc31c3fb3cc81938
  Author: wxrdnx <wxrdnx@xxxxxxxxxxxxxx>
  Date:   2024-06-03 (Mon, 03 Jun 2024)

  Changed paths:
    M instructionAPI/CMakeLists.txt
    A instructionAPI/src/InstructionDecoder-Capstone-riscv64.C
    M instructionAPI/src/InstructionDecoder-Capstone.C
    M instructionAPI/src/InstructionDecoder-Capstone.h

  Log Message:
  -----------
  code basis for riscv64 capstone


Compare: https://github.com/dyninst/dyninst/compare/17f8c750be1a%5E...d04a454175b5

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