Branch: refs/heads/master
Home: https://github.com/dyninst/dyninst
Commit: d5055bcf55802fa9a57d7dd4e5397a978ee8d4d0
https://github.com/dyninst/dyninst/commit/d5055bcf55802fa9a57d7dd4e5397a978ee8d4d0
Author: bbiiggppiigg <bbiiggppiigg@xxxxxxxxx>
Date: 2023-08-09 (Wed, 09 Aug 2023)
Changed paths:
M instructionAPI/h/ArchSpecificFormatters.h
M instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.C
M instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.h
M instructionAPI/src/AMDGPU/gfx90a/InstructionDecoder-amdgpu-gfx90a.C
M instructionAPI/src/AMDGPU/gfx90a/InstructionDecoder-amdgpu-gfx90a.h
M instructionAPI/src/ArchSpecificFormatters.C
M instructionAPI/src/Register.C
Log Message:
-----------
Fix AMDGPU register formatting (#1473)
* Separate out AMDGPU register formatting
Here we extract the logic of displaying multiple registers as
a single operand when doing instruction formatting into a separate helper
function that is only called when the architecture is passed to
Instruction.format or Operand.format;
This change enables the ability get register operand name in two ways:
Consider s[0:3]
1. Without passing in architecture, each register will be printed separately.
That is s0,s1,s2,s3
2. By passing in architecture, the first register will return a string
for the entire group, and the rest will return empty string.
That is s[0:3],"","",""
These empty strings will later be discarded by the
ArchitectureSpecificFormatter functions.
* Fix missing parameter for makeRegisterExpression
During one of the PRs that targets compiler warning,
the num_elements parameter to makeRegisterExpression is omitted,
resulting in all register operands are displayed separately,
whether they should be displayed as a group or not.
In addition to adding the parameter, certern unused helper functions
and fields of InstructionDecoder-amdgpu-gfx*** has been removed
to avoid shadowing of variable names.
Note that this change isn't applied to vega as we don't have ISA-XML for
it.
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