[DynInst_API:] [dyninst/dyninst] 7872de: add in support for decoding smem_offset operand ty...

[bbiiggppiigg <noreply@xxxxxxxxxx>]

  Branch: refs/heads/wuxx1279/amdgpu
  Home:   https://github.com/dyninst/dyninst
  Commit: 7872ded9c92dcb5b769e2253e68cfc1a635b02fa
      https://github.com/dyninst/dyninst/commit/7872ded9c92dcb5b769e2253e68cfc1a635b02fa
  Author: wuxx1279 <bbiiggppiigg@xxxxxxxxx>
  Date:   2022-10-24 (Mon, 24 Oct 2022)

  Changed paths:
    M instructionAPI/h/Result.h
    M instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.C
    M instructionAPI/src/AMDGPU/gfx908/decodeOperands.C
    M instructionAPI/src/AMDGPU/gfx908/decodeOperands.h
    M instructionAPI/src/AMDGPU/gfx908/finalizeOperands.C
    M instructionAPI/src/ArchSpecificFormatters.C

  Log Message:
  -----------
  add in support for decoding smem_offset operand type, which is still lacking from the ISA spec


  Commit: d6bf2f740b9f1236847c5eaea66f9d22a29264e7
      https://github.com/dyninst/dyninst/commit/d6bf2f740b9f1236847c5eaea66f9d22a29264e7
  Author: wuxx1279 <bbiiggppiigg@xxxxxxxxx>
  Date:   2022-10-25 (Tue, 25 Oct 2022)

  Changed paths:
    M common/h/dyn_regs.h

  Log Message:
  -----------
  add definition for waitcnt counters


  Commit: 6132d0495b01f03d1242bd14ff5857b01fccff06
      https://github.com/dyninst/dyninst/commit/6132d0495b01f03d1242bd14ff5857b01fccff06
  Author: wuxx1279 <bbiiggppiigg@xxxxxxxxx>
  Date:   2022-10-25 (Tue, 25 Oct 2022)

  Changed paths:
    M instructionAPI/h/Register.h
    M instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.C
    M instructionAPI/src/AMDGPU/gfx908/InstructionDecoder-amdgpu-gfx908.h
    M instructionAPI/src/AMDGPU/gfx908/decodeOperands.C
    M instructionAPI/src/AMDGPU/gfx908/decodeOperands.h
    M instructionAPI/src/AMDGPU/gfx908/finalizeOperands.C
    M instructionAPI/src/ArchSpecificFormatters.C
    M instructionAPI/src/InstructionDecoderImpl.C
    M instructionAPI/src/InstructionDecoderImpl.h
    M instructionAPI/src/Register.C

  Log Message:
  -----------
  Add support for formatting consecutive registers as a single operand str


Compare: https://github.com/dyninst/dyninst/compare/8ac158285052...6132d0495b01