[DynInst_API:] [dyninst/dyninst] 2764bf: 10/18 Opcode from Chapter 6

[Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>]

  Branch: refs/heads/power_vector
  Home:   https://github.com/dyninst/dyninst
  Commit: 2764bf716497bf884f078177e6fa07d4b35accd7
      https://github.com/dyninst/dyninst/commit/2764bf716497bf884f078177e6fa07d4b35accd7
  Author: Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>
  Date:   2018-10-18 (Thu, 18 Oct 2018)

  Changed paths:
    M common/h/entryIDs.h
    M instructionAPI/src/power_opcode_tables.C

  Log Message:
  -----------
  10/18 Opcode from Chapter 6

Summary of Changable fields:
  UIM:
	  12-15:
		4-524 vspltb
		4-525 vextractub
		4-589 vextractuh
		4-653 vextractuw
		4-717 vextractd
		4-781 vinsertb
		4-845 vinserth
		4-909 vinsertw
		4-973 vinsertd
		13-15:
		4-588 vsplth
    14-15:
		4-652 vspltw

  Rc bit:
		for opcode 4: always 21th bit

	ext opcode for opcode 4:
    26-31: 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 59, 60, 61, 62, 63

	new:
	  Keyword SIM, 11-15 bits
    Keyword SHB, 22-25 bits
		third-level opcode: 4-1538-x



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