Branch: refs/heads/power_vector
Home: https://github.com/dyninst/dyninst
Commit: 63c134011b66628f18fd98be82575ab881e41572
https://github.com/dyninst/dyninst/commit/63c134011b66628f18fd98be82575ab881e41572
Author: Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>
Date: 2018-10-16 (Tue, 16 Oct 2018)
Changed paths:
M common/h/entryIDs.h
M instructionAPI/src/power_opcode_tables.C
Log Message:
-----------
10/16 Revision of instructions in Chapter 7
Implementation Notes:
1. For opcode 57, 58, ext opcode resides in 30-31 bit.
2. For opcode 61 (111101), the ext opcode resides in 29-31 bit or 30-31 bit,
depending on whether 30-31 bit is 01. (Manual page 1194)
3. For the instructions with RMC and R, R is always at the 15th bit.
4. For opcode 60, the Rc bit is at the 21th bit.
new:
- Flag bit EX (31th bit), (P634)
left to be entered:
- stv(P492) & stxv(P507) , with DQ(RA) pattern.
- In opcode 60, two with XX3 format and 3 arbitrary bits and one with XX4 format.
Commit: c5932d2d07b88b3d487059c31067df198b2834bd
https://github.com/dyninst/dyninst/commit/c5932d2d07b88b3d487059c31067df198b2834bd
Author: Yuhan Xie <yxie@xxxxxxxxxxxxxxxxxx>
Date: 2018-10-16 (Tue, 16 Oct 2018)
Changed paths:
M common/h/entryIDs.h
Log Message:
-----------
10/16 Revision of instructions in Chapter 7
Implementation Notes:
1. For opcode 57, 58, ext opcode resides in 30-31 bit.
2. For opcode 61 (111101), the ext opcode resides in 29-31 bit or 30-31 bit,
depending on whether 30-31 bit is 01. (Manual page 1194)
3. For the instructions with RMC and R, R is always at the 15th bit.
4. For opcode 60, the Rc bit is at the 21th bit.
new:
- Flag bit EX (31th bit), (P634)
left to be entered:
- stv(P492) & stxv(P507) , with DQ(RA) pattern.
- In opcode 60, two with XX3 format and 3 arbitrary bits and one with XX4 format.
Compare: https://github.com/dyninst/dyninst/compare/b19e347b97d6...c5932d2d07b8
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Functionality will be removed from GitHub.com on January 31st, 2019.
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