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[DynInst_API:] [dyninst/dyninst] 48fa64: Issue #264 (SHA instruction should have 0s for bit...

Date: Thu, 04 May 2017 10:25:07 -0700
From: Sunny Shah <shah28@xxxxxxxx>
Subject: [DynInst_API:] [dyninst/dyninst] 48fa64: Issue #264 (SHA instruction should have 0s for bit... 
  Branch: refs/heads/att_syntax
  Home:   https://github.com/dyninst/dyninst
  Commit: 48fa64f9f12b810c827034ee312823346cd7fe14
      https://github.com/dyninst/dyninst/commit/48fa64f9f12b810c827034ee312823346cd7fe14
  Author: Sunny Shah <shah28@xxxxxxxx>
  Date:   2017-05-04 (Thu, 04 May 2017)

  Changed paths:
    M instructionAPI/src/InstructionDecoder-aarch64.C
    M instructionAPI/src/InstructionDecoder-aarch64.h

  Log Message:
  -----------
  Issue #264 (SHA instruction should have 0s for bits 20 and 22)

This fix should cover all SHA instructions in the SIMD category.
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