Date: | Tue, 02 May 2017 10:23:21 -0700 |
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From: | Sunny Shah <shah28@xxxxxxxx> |
Subject: | [DynInst_API:] [dyninst/dyninst] 1eff20: Issues #235(SQSHL instruction has invalid bits set... |
Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 1eff200c1158f645f1842be92771c00289a124bf https://github.com/dyninst/dyninst/commit/1eff200c1158f645f1842be92771c00289a124bf Author: Sunny Shah <shah28@xxxxxxxx> Date: 2017-05-02 (Tue, 02 May 2017) Changed paths: M instructionAPI/src/InstructionDecoder-aarch64.C M instructionAPI/src/InstructionDecoder-aarch64.h Log Message: ----------- Issues #235(SQSHL instruction has invalid bits set ) and #236(Compare instructions with zero ignore reserved bits) Added a new method to perform a check on invalid bits for certain instructions before processing their operands. |
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