Branch: refs/heads/arm64/feature/semantics_setup
Home: https://github.com/dyninst/dyninst
Commit: fdf66ae928e8ef5febaddbc031bf9491b9b2d620
https://github.com/dyninst/dyninst/commit/fdf66ae928e8ef5febaddbc031bf9491b9b2d620
Author: Sunny Shah <shah28@xxxxxxxx>
Date: 2016-07-14 (Thu, 14 Jul 2016)
Changed paths:
M common/src/dyn_regs.C
M dataflowAPI/rose/semantics/DispatcherARM64.C
M dataflowAPI/rose/semantics/SymEvalSemantics.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M parseAPI/src/IA_aarch64Details.C
Log Message:
-----------
Fixed issues seen while parsing a simple ARM binary
* Direct register expressions need to have their type set - this is set to SgAsmIntegerType for now. The type's signed-ness is set to unsigned, but it shouldn't matter because the only place register expressions' types are used is when accessing the width.
* regPos wasn't being set correctly for ARM flags when converting a Dyninst register to a ROSE register.
* The correct jump table analysis functions are now being called for ARM binaries.
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