Branch: refs/heads/bbiiggppiigg/amdgpu-branch-offset-fix
Home: https://github.com/dyninst/dyninst
Commit: 27687ce9125070845de130d6abbb71ae8505c564
https://github.com/dyninst/dyninst/commit/27687ce9125070845de130d6abbb71ae8505c564
Author: wuxx1279 <bbiiggppiigg@xxxxxxxxx>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M dyninstAPI/src/codegen/codegen-amdgpu.C
Log Message:
-----------
AMDGPU: fix SOPP short-branch relocation off-by-one (S_BRANCH PC+4)
gfx908 S_BRANCH / s_cbranch_* (SOPP) compute their destination relative to the
instruction AFTER the branch: target = (PC_of_branch + 4) + SIMM16*4. The
short-branch emitters in codegen-amdgpu.C encoded SIMM16 = disp/4, omitting the
-1 that accounts for that +4, so every displacement-computed short branch landed
one instruction (4 bytes) past its intended target.
Fix the three displacement-based emitters to compute SIMM16 = disp/4 - 1:
- insnCodeGen::generateBranch (short-jump path)
- insnCodeGen::modifyJump
- insnCodeGen::modifyJcc (the jump-to-target of the conditional-branch expansion)
The -1 is direction-agnostic (it is +4 expressed in dword units) and holds for
both forward and backward jumps. emitLongJump already accounts for this
(fromAddress + 4); the literal emitShortJump(1) skip-jumps in modifyJcc are
intentionally SIMM16=1 and are unchanged.
This affects short branches only, which are emitted when relocating a function
that has internal control flow (loops, if/else); straight-line functions relocate
using only long jumps, so the bug was previously latent.
Co-Authored-By: Claude Opus 4.8 <noreply@xxxxxxxxxxxxx>
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